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WM8816
DEVICE DESCRIPTION
The WM8816 is a stereo digital volume control designed for audio systems. The levels of the left
and right analogue channels can be programmed independently through the serial interface. The
resistor values in the internal resistor chains are decoded to 0.5 dB resolution with multiplexers,
giving a gain range of -111.5 to +15.5 dB. The code for -112 dB activates mute for maximum
attenuation.
The WM8816 has two constant impedance signal inputs. The left channel input is between LIN and
LGND, and the right channel between RIN and RGND. The output pins LFO, LMO (left) and RFO,
RMO (right) are designed to interface directly to two external op-amps, which produce the volume
controlled output signals. This provides flexibility for the supply voltage and signal swing; while the
WM8816 runs at 5V, the output signal swing depends solely on the op-amp supply.
INTERFACES
Control information is written into or read back from the internal register via the serial control port.
This port consists of a bi-directional data pin (DATA), an active low chip select pin (CSB) and the
control clock (CCLK). Control data is shifted into the serial input register on the rising edges of CCLK
pulses, while CSB is low. All control instructions require two bytes of data. The first byte contains a 4-
bit register address and a read/write bit, and the second byte is the control word. CSB must return to
high at the end of each word. When reading from the control registers, data is shifted out on the
falling edges of CCLK.
When CSB is high, the DATA pin is in a high impedance state. In a multi-channel system, the same
DATA and CCLK lines can thus be connected to several WM8816 volume controllers, and each
device can be independently addressed by pulling its CSB pin low.
OPERATING MODES
When power is first applied, a power-on reset initialises the control registers and mutes the WM8816.
To activate the device, the MUTEB pin must be high and a non-zero value must be written to the gain
register. After that the device can be muted again either by pulling the MUTEB pin low or by writing
zero (00hex) to the gain register.
CHANGING THE GAIN OF THE CHANNEL
The WM8816 has two gain registers for the left and right channels respectively. There is also an alias
register address to update both gain registers simultaneously. When a new gain value is written into
a gain register the WM8816 will wait until the next falling edge zero crossing in the input signal before
changing the gain. This ensures that no audible click is produced at the output. If there are no zero
crossings in the signal after 23ms internal delay generators change the gain regardless, right channel
followed by the left channel. If both gain registers are changed simultaneously, the gain is changed
first on the right and then the left channel.
Note: The block diagrams in this datasheet only show a representation of the feedback resistor paths
and should be thought of as the exact internal device structure. As the internal structure is different, it
is not possible to correlate the measured impedance between input and output, and the actual gain
attenuation.
PEAK LEVEL DETECTION
The WM8816 has an on-chip 8-bit digital-to-analogue converter (DAC) used for monitoring the peak
level of the output signal. The DAC input value is programmed via the serial interface. The reference
value VREF is calculated from VREF = k/256 × 18V, where k is the DAC input code. When a positive
peak signal level exceeds this value, the peak detector sets Bit 1 (for the left channel) or Bit 0 (right
channel) of the status register. These bits remain set until the status register is read.
PP Rev 1.5 October 2004
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