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LYT4211-4218/4311-4318

™

LYTSwitch-4 High Power LED Driver IC Family

Single-Stage Accurate Primary-Side Constant Current (CC) Controller with

PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options

Optimized for Different Applications and Power Levels

Part Number

LYT4211-LYT4218

LYT4311-LYT4318

Input Voltage Range

85-132 VAC

TRIAC Dimmable

No

85-132 VAC

Yes

Output Power Table

Click Here

To read about

LYTSwitch-4 Low-Line

Product

LYT4x11E

LYT4x12E

LYT4x13E

LYT4x14E

LYT4x15E

LYT4x16E

LYT4x17E

LYT4x18E

Minimum Output Power Maximum Output Power

2.5 W

3.8 W

4.5 W

5.5 W

6.8 W

8.0 W

18 W

12 W

15 W

18 W

22 W

25 W

35 W

50 W

78 W

LYT4221-4228/4321-4328

™

LYTSwitch-4 High Power LED Driver IC Family

Single-Stage Accurate Primary-Side Constant Current (CC) Controller with

PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options

Optimized for Different Applications and Power Levels

Part Number

LYT4221-LYT4228

LYT4321-LYT4328

Input Voltage Range

160-300 VAC

TRIAC Dimmable

No

160-300 VAC

Yes

Output Power Table

Click Here

To read about

LYTSwitch-4 High-Line

Product

LYT4x21E

LYT4x22E

LYT4x23E

LYT4x24E

LYT4x25E

LYT4x26E

LYT4x27E

LYT4x28E

Minimum Output Power Maximum Output Power

6 W

12 W

15 W

18 W

22 W

25 W

35 W

50 W

78 W

8 W

9 W

11 W

14 W

19 W

33 W

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LYT4211-4218/4311-4318

™

LYTSwitch-4 High Power LED Driver IC Family

Single-Stage Accurate Primary-Side Constant Current (CC) Controller with

PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options

Product Highlights

• Better than ±±5 ꢀꢀ regulation

• TRIAꢀ dimmable to less than ±5 output

• Fast start-up

• <2±0 ms at full brightness

• <1s at 105 brightness

• High power factor >0.9

AC

IN

LYTSwitch-4

D

S

V

• Easily meets EN61000-3-2

• Less than 105 THD in optimized designs

• Up to 925 efﬁcient

CONTROL

BP

R

FB

• 132 kHz switching frequency for small magnetics

PI-6800-050913

High Performance, Combined Driver, Controller, Switch

The LYTSwitch-4 family enables off-line LED drivers with high

power factor which easily meet international requirements for

THD and harmonics. Output current is tightly regulated with

better than ±±5 ꢀꢀ tolerance¹. Efﬁciency of up to 925 is easily

achieved in typical applications.

Figure 1. Typical Schematic.

Optimized for Different Applications and Power Levels

Part Number

LYT4211-LYT4218

LYT4311-LYT4318

Input Voltage Range

8±-132 VAꢀ

TRIAC Dimmable

Supports a Wide Selection of TRIAC Dimmers

No

The LYTSwitch-4 family provides excellent turn-on characteristics

for leading-edge and trailing-edge TRIAꢀ dimming applications.

This results in drivers with a wide dimming range and fast

start-up, even when turning on from a low conduction angle –

large dimming ratio and low “pop-on” current.

8±-132 VAꢀ

Yes

Output Power Table^1,2

Low Solution Cost and Long Lifetime

Product⁶

Minimum Output Power³Maximum Output Power⁴

LYTSwitch-4 Iꢀs are highly integrated and employ a primary-side

control technique that eliminates the optoisolator and reduces

component count. This allows the use of low-cost single-sided

printed circuit boards. ꢀombining PFꢀ and ꢀꢀ functions into a

single-stage also helps reduce cost and increase efﬁciency.

The 132 kHz switching frequency permits the use of small,

low-cost magnetics.

LYT4x11E⁵

2.± W

3.8 W

4.± W

±.± W

6.8 W

8.0 W

18 W

12 W

1± W

18 W

22 W

2± W

3± W

±0 W

78 W

LYT4x12E

LYT4x13E

LYT4x14E

LYT4x15E

LYT4x16E

LYT4x17E

LYT4x18E

LED drivers using the LYTSwitch-4 family do not use primary-

side aluminum electrolytic bulk capacitors. This means greatly

extended driver lifetime, especially in bulb and other high

temperature applications.

Table 1. Output Power Table.

Notes:

1. Performance for typical design. See Application Note.

2. ꢀontinuous power in an open-frame design with adequate heat sinking; device

local ambient of 70 °ꢀ. Power level calculated assuming a typical LED string

voltage and efﬁciency >805.

3. Minimum output power requires ꢀ_BP= 47 µF.

4. Maximum output power requires ꢀ_BP= 4.7 µF.

±. LYT4311 ꢀ_BP= 47 µF, LYT4211 ꢀ_BP= 4.7 µF.

6. Package: eSIP-7ꢀ (see Figure 2).

eSIP-7ꢀ (E Package)

Figure 2. Package Options.

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November 2014

This Product is Covered by Patents and/or Pending Patent Applications.

LYT4211-4218/4311-4318

Topology

Isolated Flyback

Buck

Tapped-Buck

Buck-Boost

Isolation

Efﬁciency

885

Cost

High

Low

Middle

Low

THD

Best

Good

Best

Output Voltage

Any

Yes

No

925

895

905

Limited

Any

High-Voltage

Table 2.

Performance of Different Topologies in a Typical Non-Dimmable 10 W Low-Line Design.

Typical Circuit Schematic

Key Features

Flyback

Beneﬁts

•

Provides isolated output

Supports widest range of output voltages

Very good THD performance

Limitations

AC

IN

LYTSwitch-4

CONTROL

•

Flyback transformer

D

S

V

•

Overall efﬁciency reduced by parasitic capacitance

and inductance in the transformer

BP

R

FB

•

Larger PꢀB area to meet isolation requirements

•

Requires additional components (primary clamp and bias)

Higher RMS switch and winding currents increases losses

and lowers efﬁciency

PI-6800-050913

Figure 3a. Typical Isolated Flyback Schematic.

Buck

Beneﬁts

•

Highest efﬁciency

Lowest component count – small size

Simple low-cost power inductor

Low drain source voltage stress

Best EMI/lowest component count for ﬁlter

AC

IN

LYTSwitch-4

BP

D

S

V

Limitations

Single input line voltage range

CONTROL

•

R

FB

•

Output voltage <0.6 × V_IN(Aꢀ)× 1.41

Output voltage for low THD designs

Non-isolated

PI-6841-111813

Figure 3b. Typical Buck Schematic.

Tapped-Buck

Beneﬁts

•

Ideal for low output voltage designs (<20 V)

High efﬁciency

Low component count

Simple low-cost tapped inductor

LYTSwitch-4

V

AC

IN

Limitations

D

CONTROL

BP

•

Designs best suited for single input line voltage

Requires additional components (primary clamp)

Non-isolated

S

R

FB

PI-6842-111813

Figure 3c. Typical Tapped-Buck Schematic.

Buck-Boost

Beneﬁts

•

Ideal for non-isolated high output voltage designs

High efﬁciency

Low component count

Simple common low-cost power inductor can be used

Lowest THD

AC

IN

LYTSwitch-4

BP

D

V

Limitations

CONTROL

•

Maximum V_OUTis limited by MOSFET breakdown voltage

Single input line voltage range

Non-isolated

S

R

FB

PI-6859-111813

Figure 3d. Typical Buck-Boost Schematic.

2

Rev. E 11/14

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LYT4211-4218/4311-4318

DRAIN (D)

5.9 V

REGULATOR

BYPASS (BP)

BYPASS

CAPACITOR

SELECT

SOFT-START

TIMER

HYSTERETIC

THERMAL

SHUTDOWN

+

-

FAULT

PRESENT

I_LIM

M_I

5.9 V

5.0 V

AUTO-RESTART

COUNTER

BYPASS PIN

UNDERVOLTAGE

Gate

Driver

1 V

VOLTAGE

MONITOR (V)

SenseFet

LEB

STOP

LOGIC

JITTER

CLOCK

Comparator

OSCILLATOR

-

+

FB_OFF

3-V_T

DC_MAX

OCP

OV

LINE

SENSE

+

-

CURRENT LIMIT

COMPARATOR

I_LIM

I_V

FEEDBACK (FB)

PFC/CC

CONTROL

V_SENSE

V_BG

M_I

I_FB

FB_OFF

FEEDBACK

SENSE

DC_MAX

I_S

REFERENCE

BLOCK

REFERENCE (R)

V_BG

6.4 V

PI-6843-071112

SOURCE (S)

Figure 4. Functional Block Diagram.

VOLTAGE MONITOR (V) Pin:

Pin Functional Description

This pin interfaces with an external input line peak detector,

consisting of a rectiﬁer, ﬁlter capacitor and resistors. The

applied current is used to control stop logic for overvoltage (OV),

provide feed-forward to control the output current and the

remote ON/OFF function.

DRAIN (D) Pin:

This pin is the power FET drain connection. It also provides

internal operating current for both start-up and steady-state

operation.

SOURCE (S) Pin:

This pin is the power FET source connection. It is also the

ground reference for the BYPASS, FEEDBAꢀK, REFERENꢀE

and VOLTAGE MONITOR pins.

E Package (eSIP-7C)

(Top View)

BYPASS (BP) Pin:

Exposed Pad

(Backside) Internally

Connected to

SOURCE Pin (see

eSIP-7C Package

Drawing)

This is the connection point for an external bypass capacitor for

the internally generated ±.9 V supply. This pin also provides

output power selection through choice of the BYPASS pin

capacitor value.

FEEDBACK (FB) Pin:

The FEEDBAꢀK pin is used for output voltage feedback. The

current into the FEEDBAꢀK pin is directly proportional to the

output voltage. The FEEDBAꢀK pin also includes circuitry to

protect against open load and overload output conditions.

PI-7076-062513

REFERENCE (R) Pin:

Figure 5. Pin Conﬁguration.

This pin is connected to an external precision resistor and is

used to conﬁgure for dimming (LYT4311-4318) and non-TRIAꢀ

dimming (LYT4211-4218) modes of operation.

3

Rev. E 11/14

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LYT4211-4218/4311-4318

For non-dimming or PWM dimming applications with LYT4211-

4218, the external resistor should be a 24.9 kW ±15. For phase

angle Aꢀ dimming with LYT4311-4318, the external resistor

should be a 49.9 kW ±15. One percent resistors are

recommended as the resistor tolerance directly affects the

output tolerance. Other resistor values should not be used.

Functional Description

A LYTSwitch-4 device monolithically combines a controller and

high-voltage power FET into one package. The controller

provides both high power factor and constant current output in

a single-stage. The LYTSwitch-4 controller consists of an

oscillator, feedback (sense and logic) circuit, ±.9 V regulator,

hysteretic over-temperature protection, frequency jittering,

cycle-by-cycle current limit, auto-restart, inductance correction,

power factor and constant current control.

BYPASS Pin Capacitor Power Gain Selection

LYTSwitch-4 devices have the capability to tailor the internal

gain to either full or a reduced output power setting. This allows

selection of a larger device to minimize dissipation for both

thermal and efﬁciency reasons. The power gain is selected with

the value of the BYPASS pin capacitor. The full power setting is

selected with a 4.7 µF capacitor and the reduced power setting

(for higher efﬁciency) is selected with a 47 µF capacitor. The

BYPASS pin capacitor sets both the internal power gain as well

as the over-current protection (OꢀP) threshold. Unlike the

larger devices, the LYT4x11 power gain is not programmable.

Use a 47 µF capacitor for the LYT4x11.

FEEDBACK Pin Current Control Characteristics

The ﬁgure shown below illustrates the operating boundaries of

the FEEDBAꢀK pin current. Above I_FB(SKIP)switching is disabled

and below I_FB(AR)the device enters into auto-restart.

I_FB(SKIP)

Skip-Cycle

Switching Frequency

The switching frequency is 132 kHz during normal operation.

To further reduce the EMI level, the switching frequency is

jittered (frequency modulated) by approximately 2.6 kHz.

During start-up the frequency is 66 kHz to reduce start-up time

when the Aꢀ input is phase angle dimmed. Jitter is disabled in

deep dimming.

CC Control

Region

I_FB

I_FB(DCMAXR)

Soft-Start

The controller includes a soft-start timing feature which inhibits

the auto-restart protection feature for the soft-start period (t_SOFT

to distinguish start-up into a fault (short-circuit) from a large

output capacitor. At start-up the LYTSwitch-4 clamps the

maximum duty cycle to reduce the output power. The total

)

Soft-Start and

CC Fold-Back

Region

soft-start period is t_SOFT

.

Remote ON/OFF and EcoSmart^™

The VOLTAGE MONITOR pin has a 1 V threshold comparator

connected at its input. This voltage threshold is used for

remote ON/OFF control. When a signal is received at the

VOLTAGE MONITOR pin to disable the output (VOLTAGE

MONITOR pin tied to ground through an optocoupler photo-

transistor) the LYTSwitch-4 will complete its current switching

cycle before the internal power FET is forced off.

I_FB(AR)

Auto-Restart

DC10

Maximum Duty Cycle

DC_MAX

PI-5433-060410

Figure 6. FEEDBACK Pin Current Characteristic.

The FEEDBAꢀK pin current is also used to clamp the maximum

duty cycle to limit the available output power for overload and

open-loop conditions. This duty cycle reduction characteristic

also promotes a monotonic output current start-up characteristic

and helps preventing over-shoot.

The remote ON/OFF feature can also be used as an eco-mode

or power switch to turn off the LYTSwitch-4 and keep it in a

very low power consumption state for indeﬁnite long periods.

When the LYTSwitch-4 is remotely turned on after entering this

mode, it will initiate a normal start-up sequence with soft-start

the next time the BYPASS pin reaches ±.9 V. In the worst case,

the delay from remote on to start-up can be equal to the full

discharge/charge cycle time of the BYPASS pin. This reduced

consumption remote off mode can eliminate expensive and

unreliable in-line mechanical switches.

REFERENCE Pin

The REFERENꢀE pin is tied to ground (SOURꢀE) via an external

resistor. The value selected sets the internal references,

determining the operating mode for dimming (LYT4311-4318)

and non-dimming (LYT4211-4218) operation and the line

overvoltage thresholds of the VOLTAGE MONITOR pin.

4

Rev. E 11/14

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LYT4211-4218/4311-4318

completed. Special consideration must be made to appropriately

size the output capacitor to ensure that after the soft-start

period (t_SOFT) the FEEDBAꢀK pin current is above the I_FB(AR)

threshold to ensure successful power-supply start-up. After the

soft-start time period, auto-restart is activated only when the

D

S

V

CONTROL

FEEDBAꢀK pin current falls below I_FB(AR)

.

BP

Over-Current Protection

R

FB

The current limit circuit senses the current in the power FET.

When this current exceeds the internal threshold (I_LIMIT), the power

FET is turned off for the remainder of that cycle. A leading edge

blanking circuit inhibits the current limit comparator for a short

time (t_LEB) after the power FET is turned on. This leading edge

blanking time has been set so that current spikes caused by

capacitance and rectiﬁer reverse recovery will not cause

premature termination of the power FET conduction.

PI-5435-052510

Figure 7. Remote ON/OFF VOLTAGE MONITOR Pin Control.

Line Overvoltage Protection

5.9 V Regulator/Shunt Voltage Clamp

This device includes overvoltage detection to limit the maximum

operating voltage detected through the VOLTAGE MONITOR pin.

An external peak detector consisting of a diode and capacitor is

required to provide input line peak voltage to the VOLTAGE

MONITOR pin through a resistor.

The internal ±.9 V regulator charges the bypass capacitor

connected to the BYPASS pin to ±.9 V by drawing a current

from the voltage on the DRAIN pin whenever the power FET is

off. The BYPASS pin is the internal supply voltage node. When

the power FET is on, the device operates from the energy stored

in the bypass capacitor. Extremely low power consumption of the

internal circuitry allows LYTSwitch-4 to operate continuously from

current it takes from the DRAIN pin. A bypass capacitor value

of 47 or 4.7 µF is sufﬁcient for both high frequency decoupling

and energy storage. In addition, there is a 6.4 V shunt regulator

clamping the BYPASS pin at 6.4 V when current is provided to

the BYPASS pin through an external resistor. This facilitates

powering of LYTSwitch-4 externally through a bias winding to

increase operating efﬁciency. It is recommended that the

BYPASS pin is supplied current from the bias winding for

normal operation.

The resistor sets line overvoltage (OV) shutdown threshold which,

once exceeded, forces the LYTSwitch-4 to stop switching. Once

the line voltage returns to normal, the device resumes normal

operation. A small amount of hysteresis is provided on the OV

threshold to prevent noise-generated toggling. When the power

FET is off, the rectiﬁed Dꢀ high voltage surge capability is

increased to the voltage rating of the power FET (72± V), due to the

absence of the reﬂected voltage and leakage spikes on the drain.

Hysteretic Thermal Shutdown

The thermal shutdown circuitry senses the controller die

temperature. The threshold is set at 142 °ꢀ typical with a 7± °ꢀ

hysteresis. When the die temperature rises above this threshold

(142 °ꢀ) the power FET is disabled and remains disabled until

the die temperature falls by 7± °ꢀ, at which point the power FET

is re-enabled.

Auto-Restart

In the event of an open-loop fault (open FEEDBAꢀK pin resistor

or broken path to feedback winding), output short-circuits or an

overload condition the controller enters into the auto-restart

mode. The controller annunciates both short-circuit and

open-loop conditions once the FEEDBAꢀK pin current falls

below the I_FB(AR)threshold after the soft-start period. To minimize

the power dissipation under this fault condition the shutdown/

auto-restart circuit turns the power supply on (same as the

soft-start period) and off at an auto-restart duty cycle of

typically Dꢀ_ARfor as long as the fault condition persists. If the

fault is removed during the auto-restart off-time, the power

supply will remain in auto-restart until the full off-time count is

Safe Operating Area (SOA) Protection

The device also features a safe operating area (SOA) protection

mode which disables FET switching for 40 cycles in the event

the peak switch current reaches the I_LIMITthreshold and the switch

on-time is less than t_ON(SOA). This protection mode protects the

device under short-circuited LED conditions and at start-up during

the soft-start period when auto-restart protection is inhibited.

The SOA protection mode remains active in normal operation.

5

Rev. E 11/14

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LYT4211-4218/4311-4318

peak drain voltage of U1 below the 72± V rating of the internal

power FET. Bridge rectiﬁer BR1 rectiﬁes the Aꢀ line voltage.

EMI ﬁltering is provided by L1-L3, ꢀ1, ꢀ4, R2, R24 and R2±

together with the safety rated Y class capacitor (ꢀY1) that bridges

the safety isolation barrier between primary and secondary.

Resistor R2, R24 and R2± act to damp any resonances formed

between L1, L2, L3, ꢀ1 and the Aꢀ line impedance. A small

bulk capacitor (ꢀ4) is required to provide a low impedance

source for the primary switching current. The maximum value

of ꢀ2 and ꢀ4 is limited in order to maintain a power factor of

greater than 0.9.

Application Example

20 W TRIAC Dimmable High Power Factor LED Driver

Design Example (DER-350)

The circuit schematic in Figure 8 shows a TRIAꢀ dimmable high

power factor LED driver based on LYT4317E from the LYTSwitch-4

family of devices. The design is conﬁgurable for non-dimmable

only applications by simple component value changes. It was

optimized to drive an LED string at a voltage of 36 V with a

constant current of 0.7 A ideal for Lumens PAR lamp retro-ﬁt

applications. The design operates over an input voltage range

of 90 VAꢀ to 132 VAꢀ.

LYTSwitch-4 Primary

To provide peak line voltage information to U1 the incoming

rectiﬁed Aꢀ peak charges ꢀ6 via D2. This is then fed into the

VOLTAGE MONITOR pin of U1 as a current via R10. This

sensed current is also used by the device to set the line input

overvoltage protection threshold. Resistor R9 provides a

discharge path for ꢀ6 with a time constant much longer than

that of the rectiﬁed Aꢀ to prevent generation of line frequency

ripple.

The key goals of this design were compatibility with standard

leading edge TRIAꢀ Aꢀ dimmers, very wide dimming range

(1000:1, ±±0 mA:0.±± mA), high efﬁciency (>8±5) and high

power factor (>0.9). The design is fully protected from faults

such as no-load (open load), overvoltage and output short-

circuit or overload conditions and over temperature.

Circuit Description

The LYTSwitch-4 device (U1- LYT4317E) integrates the power

FET, controller and start-up functions into a single package

reducing the component count versus typical implementations.

ꢀonﬁgured as part of an isolated continuous conduction mode

ﬂyback converter, U1 provides high power factor via its internal

control algorithm together with the small input capacitance of

the design. ꢀontinuous conduction mode operation results in

reduced primary peak and RMS current. This both reduces

EMI noise, allowing simpler, smaller EMI ﬁltering components

and improves efﬁciency. Output current regulation is maintained

without the need for secondary-side sensing which eliminates

current sense resistors and improves efﬁciency.

The VOLTAGE MONITOR pin current and the FEEDBAꢀK pin

current are used internally to control the average output LED

current. For TRIAꢀ phase-dimming applications a 49.9 kW

resistor (R14) is used on the REFERENꢀE pin and 2 MW (R10)

on the VOLTAGE MONITOR pin to provide a linear relationship

between input voltage and the output current and maximizing

the dimming range.

Diode D3, R1± and ꢀ7 clamp the drain voltage to a safe level

due to the effects of leakage inductance. Diode D4 is

necessary to prevent reverse current from ﬂowing through U1

for the period of the rectiﬁed Aꢀ input voltage that the voltage

across ꢀ4 falls to below the reﬂected output voltage (V_OR).

Input Stage

Fuse F1 provides protection from component failures while RV1

provides a clamp during differential line surges, keeping the

C13

100 pF

200 V

R26

30 Ω

C11

C12

63 V

D9

D2

DFLU1400

36 V,

R23

20 kΩ

330 µF 330 µF

DFLU1400-7

550 mA

63 V

12

1

FL1

R24

D7

47 kΩ

R9

510 kΩ

1/8 W

C7

2.2 nF

630 V

BYW29-200

R15

200 kΩ

1/8 W

BR1

MB6S

600 V

FL2

10

D6

RTN

BAV21

R20

39 Ω

1/8 W

C9

C5

100 nF

50 V

D3

US1J

56 µF

50 V

11

R10

C1

220 nF

250 V

R1

510

1/2 W

T1

RM8

2 MΩ

R19

20 kΩ

1%

1/8 W

D4

C2

C4

C6

R6

US1D

100 nF

250 V

100 nF 2.2 µF

360 kΩ

250 V 250 V

L3

5 mH

D5

R2

R25

47 kΩ

1/8 W

L1

1 mH

L2

1 mH

BAV16

47 kΩ

D8

1/8 W

R17

3 kΩ

1/10 W

R18

165 kΩ

1%

BAV21

D

S

V

1/16 W

CONTROL

LYTSwitch-4

U1

LYT4317E

BP

RV1

140 VAC

F1

5 A

Q1

Q2

MMBT3904

R

FB

R14

C15

100 nF

50 V

X0202MA2BL2

90 - 132

VAC

C3

470 nF

50 V

L

N

49.9 kΩ

1%

1/16 W

R27

R22

1 kΩ

1/10 W

C14

10 nF

50 V

R8

100 Ω

1 W

10 Ω

C8

47 µF

16 V

1/10 W

CY1

470 pF

250 VAC

PI-6875-052213

Figure 8. DER-350 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 90-132 VAC, 20 W / 36 V / 550 mA LED Driver.

6

Rev. E 11/14

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LYT4211-4218/4311-4318

Diode D6, ꢀ±, ꢀ9, R19 and R20 create the primary bias supply

from an auxiliary winding on the transformer. ꢀapacitor ꢀ8

provides local decoupling for the BYPASS pin of U1 which is the

supply pin for the internal controller. During start-up ꢀ8 is

charged to ~6 V from an internal high-voltage current source

tied to the device DRAIN pin. This allows the part to start

switching at which point the operating supply current is provided

from the bias supply via R17. ꢀapacitor ꢀ8 also selects the

output power mode (47 µF for reduced power was selected to

reduce dissipation in U1 and increase efﬁciency for this design).

TRIAC Phase Dimming Control Compatibility

The requirement to provide output dimming with low-cost,

TRIAꢀ-based, leading edge phase dimmers introduces a

number of trade-offs in the design.

Due to the much lower power consumed by LED based lighting

the current drawn by the overall lamp is below the holding

current of the TRIAꢀ within the dimmer. This can cause

undesirable behaviors such as limited dimming range and/or

ﬂickering as the TRIAꢀ ﬁres inconsistently. The relatively large

impedance the LED lamp presents to the line allows signiﬁcant

ringing to occur due to the inrush current charging the input

capacitance when the TRIAꢀ turns on. This too can cause

similar undesirable behavior as the ringing may cause the

TRIAꢀ current to fall to zero and turn off.

Feedback

The bias winding voltage is proportional to the output voltage

(set by the turns ratio between the bias and secondary

windings). This allows the output voltage to be monitored

without secondary-side feedback components. Resistor R18

converts the bias voltage into a current which is fed into the

FEEDBAꢀK pin of U1. The internal engine within U1 combines

the FEEDBAꢀK pin current, the VOLTAGE MONITOR pin current

and drain current information to provide a constant output

current over a 1.±:1 output voltage variation (LED string voltage

variation of ±2±5) at a ﬁxed line input voltage.

To overcome these issues simple two circuits, the SꢀR active

damper and R-ꢀ passive bleeder, are incorporated. The

drawback of these circuits is increased dissipation and

therefore reduced efﬁciency of the supply. For non-dimming

applications these components can simply be omitted.

The SꢀR active damper consists of components R6, ꢀ3, and

Q1 in conjunction with R8. This circuit limits the inrush current

that ﬂows to charge ꢀ4 when the TRIAꢀ turns on by placing R8

in series for the ﬁrst ~1 ms of the TRIAꢀ conduction. After

approximately 1 ms, Q1 turns on and bypasses R8. This keeps

the power dissipation on R8 low and allows a larger value

during current limiting. Resistor R6 and ꢀ3 provide the delay

on Q1 turn on after the TRIAꢀ conducts. Diode D9 blocks the

charge in capacitor ꢀ4 from ﬂowing back after the TRIAꢀ turns

on which helps in dimming compatibility especially with high

power dimmers.

To limit the output voltage at no-load an output overvoltage

protection circuit is set by D8, ꢀ1±, R22, VR4, R27, ꢀ14 and Q2.

Should the output load be disconnected then the bias voltage

will increase until VR4 conducts, turning on Q2 and reducing

the current into the FEEDBAꢀK pin. When this current drops

below 10 µA the part enters auto-restart and switching is

disabled for 300 ms allowing time for the output and bias

voltages to fall.

Output Rectiﬁcation

The transformer secondary winding is rectiﬁed by D7 and

ﬁltered by ꢀ11 and ꢀ12. An ultrafast TO-220 diode was

selected for efﬁciency and the combined value of ꢀ11 and ꢀ12

were selected to give peak-to-peak LED ripple current equal to

305 of the mean value. For designs where lower ripple is

desirable the output capacitance value can be increased.

The passive bleeder circuit is comprised of R1 and ꢀ1. This

helps keep the input current above the TRIAꢀ holding current

while the input current corresponding to the effective driver

resistance increases during each Aꢀ half-cycle.

A small pre-load is provided by R23 which discharges residual

charge in output capacitors when turned off.

7

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Modiﬁed DER-350 20 W High Power Factor LED Driver

for Non-Dimmable and Enhanced Line Regulation

• For maximum output power column

• Reﬂected output voltage (V_OR) of 6± V

• FEEDBAꢀK pin current of 16± µA

• BYPASS pin capacitor value of 4.7 µF (LYT4x11 = 4.7 µF)

The circuit schematic in Figure 9 shows a high power factor

LED driver based on a LYT4317 from the LYTSwitch-4 family of

devices. It was optimized to drive an LED string at a voltage of

36 V with a constant current of 0.±± A, ideal for high lumen PAR

lamp retro-ﬁt applications. The design operates over the

low-line input voltage range of 90 VAꢀ to 132 VAꢀ and is

non-dimming application. A non-dimming application has

tighter output current variation with changes in the line voltage

than a dimming application. It’s key to note that, although not

speciﬁed for dimming, no circuit damage will result if the end

user does operate the design with a phase controlled dimmer.

Note that input line voltages above 8± VAꢀ do not change the

power delivery capability of LYTSwitch-4 devices.

Device Selection

Select the device size by comparing the required output power

to the values in Table 1. For thermally challenging designs, e.g.,

incandescent lamp replacement, where either the ambient

temperature local to the LYTSwitch-4 device is high and/or

there is minimal space for heat sinking use the minimum output

power column. This is selected by using a 47 µF BYPASS pin

capacitor and results in a lower device current limit and therefore

lower conduction losses. For open frame design or designs

where space is available for heat sinking then refer to the

maximum output power column. This is selected by using a

4.7 µF BYPASS pin capacitor for all but the LYT4x11 which has

only one power setting. In all cases in order to obtain the best

output current tolerance maintain the device temperature below

100 °ꢀ

Modiﬁcation for Non-Dimmable Conﬁguration

The design is conﬁgurable for non-dimmable application by

simply removing the component for SꢀR active damper (R6,

R8, ꢀ3, and Q1), blocking diode D9 and R-ꢀ bleeder (R1, ꢀ1)

changes and replacing the reference resistor R14 with 24.9 kW.

(See Figure 9)

Key Application Considerations

Power Table

Maximum Input Capacitance

The data sheet power table (Table 1) represents the minimum

and maximum practical continuous output power based on the

following conditions:

To achieve high power factor, the capacitance used in both the

EMI ﬁlter and for decoupling the rectiﬁed Aꢀ (bulk capacitor)

must be limited in value. The maximum value is a function of

the output power of the design and reduces as the output

power reduces. For the majority of designs limit the total

capacitance to less than 200 nF with a bulk capacitor value of

100 nF. Film capacitors are recommended compared to

ceramic types as they minimize audible noise with operating

with leading edge phase dimmers. Start with a value of 10 nF

for the capacitance in the EMI ﬁlter and increase in value until

there is sufﬁcient EMI margin.

• Efﬁciency of 805

• Device local ambient of 70 °ꢀ

• Sufﬁcient heat sinking to keep the device temperature below

100 °ꢀ

• For minimum output power column

• Reﬂected output voltage (V_OR) of 120 V

• FEEDBAꢀK pin current of 13± µA

• BYPASS pin capacitor value of 47 µF

C13

100 pF

200 V

R26

30 Ω

R24

C11

C12

63 V

47 kΩ

D2

DFLU1400

36 V,

R23

20 kΩ

330 µF 330 µF

1/8 W

550 mA

63 V

12

1

FL1

D7

R9

510 kΩ

1/8 W

BYW29-200

C7

2.2 nF

630 V

R15

200 kΩ

BR1

MB6S

600 V

FL2

10

D6

RTN

BAV21

R20

39 Ω

1/8 W

C9

C5

100 nF

50 V

D3

US1J

56 µF

50 V

11

R10

T1

RM8

2 MΩ

R19

20 kΩ

1%

1/8 W

D4

C2

100 nF

250 V

C4

C6

US1D

R2

47 kΩ

1/8 W

R25

47 kΩ

1/8 W

100 nF 2.2 µF

L1

1 mH

L2

1 mH

250 V 250 V

L3

5 mH

D5

BAV16

D8

R17

3 kΩ

1/10 W

R18

165 kΩ

1%

BAV21

D

S

V

1/16 W

CONTROL

LYTSwitch-4

U1

LYT4317E

RV1

BP

140 VAC

F1

5 A

Q2

MMBT3904

R

FB

R14

C15

100 nF

50 V

90 - 132

VAC

L

N

24.9 kΩ

1%

1/16 W

R27

R22

1 kΩ

1/10 W

C14

10 nF

50 V

10 Ω

C8

47 µF

16 V

1/10 W

CY1

470 pF

250 VAC

PI-6875a-052213

Figure 9. Modiﬁed Schematic of RD-350 for Non-Dimmable, Isolated, High Power Factor, 90-132 VAC, 20 W / 36 V LED Driver.

8

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

REFERENCE Pin Resistance Value Selection

Operation with Phase Controlled Dimmers

The LYTSwitch-4 family contains phase dimming devices,

LYT4311-4318, and non-dimming devices, LYT4211-4218. The

non-dimmable devices use a 24.9 kW ±15 REFERENꢀE pin

resistor for best output current tolerance (over Aꢀ input voltage

changes). The dimmable devices (i.e. LYT4311-4318) use 49.9 kW

±15 to achieve the widest dimming range.

Dimmer switches control incandescent lamp brightness by not

conducting (blanking) for a portion of the Aꢀ voltage sine wave.

This reduces the RMS voltage applied to the lamp thus reducing

the brightness. This is called natural dimming and the LYTSwitch-4

LYT4311-4318 devices when conﬁgured for dimming utilize

natural dimming by reducing the LED current as the RMS line

voltage decreases. By this nature, line regulation performance is

purposely decreased to increase the dimming range and more

closely mimic the operation of an incandescent lamp. Using a

49.9 kW REFERENꢀE pin resistance selects natural dimming

mode operation.

VOLTAGE MONITOR Pin Resistance Network Selection

For widest Aꢀ phase angle dimming range with LYT4311-4318,

use a 2 MW (1.7 MW for 100 VAꢀ (Japan)) resistor connected to

the line voltage peak detector circuit. Make sure that the

resistor’s voltage rating is sufﬁcient for the peak line voltage. If

necessary use multiple series connected resistors.

Leading Edge Phase Controlled Dimmers

The requirement to provide ﬂicker-free output dimming with low-

cost, TRIAꢀ-based, leading edge phase dimmers introduces a

number of trade-offs in the design.

Primary Clamp and Output Reﬂected Voltage V_OR

A primary clamp is necessary to limit the peak drain to source

voltage. A Zener clamp requires the fewest components and

board space and gives the highest efﬁciency. RꢀD clamps are

also acceptable however the peak drain voltage should be

carefully veriﬁed during start-up and output short-circuits as the

clamping voltage varies with signiﬁcantly with the peak drain

current.

Due to the much lower power consumed by LED based lighting

the current drawn by the overall lamp is below the holding

current of the TRIAꢀ within the dimmer. This causes

undesirable behaviors such as limited dimming range and/or

ﬂickering. The relatively large impedance the LED lamp presents

to the line allows signiﬁcant ringing to occur due to the inrush

current charging the input capacitance when the TRIAꢀ turns

on. This too can cause similar undesirable behavior as the

ringing may cause the TRIAꢀ current to fall to zero and turn off.

For the highest efﬁciency, the clamping voltage should be

selected to be at least 1.± times the output reﬂected voltage,

V_OR, as this keeps the leakage spike conduction time short.

This will ensure efﬁcient operation of the clamp circuit and will

also keep the maximum drain voltage below the rated

breakdown voltage of the FET. An RꢀD (or RꢀDZ) clamp

provides tighter clamp voltage tolerance than a Zener clamp.

The RꢀD clamp is more cost effective than the Zener clamp but

requires more careful design to ensure that the maximum drain

voltage does not exceed the power FET breakdown voltage.

These V_ORlimits are based on the BV_DSSrating of the internal

FET, a V_ORof 60 V to 100 V is typical for most designs, giving

the best PFꢀ and regulation performance.

To overcome these issues two circuits, the active damper and

passive bleeder, are incorporated. The drawback of these

circuits is increased dissipation and therefore reduced efﬁciency

of the supply so for non-dimming applications these components

can simply be omitted.

Figure 10a shows the line voltage and current at the input of a

leading edge TRIAꢀ dimmer with Figure 10b showing the

resultant rectiﬁed bus voltage. In this example, the TRIAꢀ

conducts at 90 degrees.

Series Drain Diode

PI-5983-060810

An ultrafast or Schottky diode in series with the drain is

necessary to prevent reverse current ﬂowing through the

device. The voltage rating must exceed the output reﬂected

voltage, V_OR. The current rating should exceed two times the

average primary current and have a peak rating equal to the

maximum drain current of the selected LYTSwitch-4 device.

350

250

150

50

0.35

0.25

0.15

0.05

-0.05

-0.15

-0.25

Voltage

Current

0.5

50

100

150

200

250

300

350

400

-50

Line Voltage Peak Detector Circuit

LYTSwitch-4 devices use the peak line voltage to regulate the

power delivery to the output. A capacitor value of 1 µF to 4.7 µF

is recommended to minimize line ripple and give the highest

power factor (>0.9), smaller values are acceptable but result in

lower PF and higher line current distortion.

-150

-250

-350

-0.35

Conduction Angle (°)

Figure 10a. Ideal Input Voltage and Current Waveform for a Leading Edge

TRIAC Dimmer at 90°.

9

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

PI-5984-060810

PI-5986-060810

350

0.35

0.3

350

250

150

50

0.35

0.25

0.15

0.05

-0.05

-0.15

-0.25

Voltage

Current

300

Current

250

200

150

100

50

0.25

0.2

0

50

100

150

200

250

300

350

0.15

0.1

-50

-150

-250

0.05

0

-350

-0.35

50

100

0

150

200

250

300

350

400

Conduction Angle (°)

Figure 10b. Resultant Waveforms Following Rectiﬁcation of TRIAC Dimmer Output.

Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing

Edge Dimmer at 90° Conduction Angle.

Figure 11 shows undesired rectiﬁed bus voltage and current

with the TRIAꢀ turning off prematurely and restarting.

Start by adding a bleeder circuit. Add a 0.44 µF capacitor and

±10 W 1 W resistor (components in series) across the rectiﬁed

bus (ꢀ1 and R1 in Figure 8). If the results in satisfactory operation

reduce the capacitor value to the smallest that result in acceptable

performance to reduce losses and increase efﬁciency.

If the TRIAꢀ is turning off before the end of the half-cycle

erratically or alternate half Aꢀ cycles have different conduction

angles then ﬂicker will be observed in the LED light due to

variations in the output current. This can be solved by including

a bleeder and damper circuit.

If the bleeder circuit does not maintain conduction in the TRIAꢀ,

then add an active damper as shown in Figure 8. This consists

of components R6, ꢀ3, and Q1 in conjunction with R8. This

circuit limits the inrush current that ﬂows to charge ꢀ4 when the

TRIAꢀ turns on by placing R8 in series for the ﬁrst 1 ms of the

TRIAꢀ conduction. After approximately 1 ms, Q1 turns on and

shorts R8. This keeps the power dissipation on R8 low and

allows a larger value to be used during current limiting.

Increasing the delay before Q1 turns on by increasing the value

of resistor R6 will improve dimmer compatibility but cause more

power to be dissipated across R8. Monitor the Aꢀ line current

and voltage at the input of the power supply as you make the

adjustments. Increase the delay until the TRIAꢀ operates

properly but keep the delay as short as possible for efﬁciency.

Dimmers will behave differently based on manufacturer and

power rating, for example a 300 W dimmer requires less

dampening and requires less power loss in the bleeder than a

600 W or 1000 W dimmer due to different drive circuits and

TRIAꢀ holding current speciﬁcations. Multiple lamps in parallel

driven from the same dimmer can introduce more ringing due to

the increased capacitance of parallel units. Therefore, when

testing dimmer operation verify on a number of models,

different line voltages and with both a single driver and multiple

drivers in parallel.

PI-5985-060810

350

300

250

200

150

100

50

0.35

0.3

Voltage

Current

As a general rule the greater the power dissipated in the bleeder

and damper circuits, the more types of dimmers will work with

the driver.

0.25

0.2

Trailing Edge Phase Controlled Dimmers

0.15

0.1

Figure 11 shows the line voltage and current at the input of the

power supply with a trailing edge dimmer. In this example, the

dimmer conducts at 90 degrees. Many of these dimmers use

back-to-back connected power FETs rather than a TRIAꢀ to

control the load. This eliminates the holding current issue of

TRIAꢀs and since the conduction begins at the zero crossing,

high current surges and line ringing are minimized. Typically these

types of dimmers do not require damping and bleeder circuits.

0.05

0

50

100

0

150

200

250

300

350

400

Conduction Angle (°)

Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing.

10

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Audible Noise Considerations for Use with

Leading Edge Dimmers

lifetime. For every 10 °ꢀ rise in temperature, component life is

reduced by a factor of 2. Therefore it is important to properly

heat sink and to verify the operating temperatures of all devices.

Noise created when dimming is typically created by the input

capacitors, EMI ﬁlter inductors and the transformer. The input

capacitors and inductors experience high di/dt and dv/dt every

Aꢀ half-cycle as the TRIAꢀ ﬁres and an inrush current ﬂows to

charge the input capacitance. Noise can be minimized by

selecting ﬁlm vs. ceramic capacitors, minimizing the capacitor

value and selecting inductors that are physically short and wide.

Layout Considerations

Primary-Side Connections

Use a single point (Kelvin) connection at the negative terminal of

the input ﬁlter capacitor for the SOURꢀE pin and bias returns.

This improves surge capabilities by returning surge currents

from the bias winding directly to the input ﬁlter capacitor. The

BYPASS pin capacitor should be located as close to the

BYPASS pin and connected as close to the SOURꢀE pin as

possible. The SOURꢀE pin trace should not be shared with the

main power FET switching currents. All FEEDBAꢀK pin

components that connect to the SOURꢀE pin should follow the

same rules as the BYPASS pin capacitor. It is critical that the

main power FET switching currents return to the bulk capacitor

with the shortest path as possible. Long high current paths

create excessive conducted and radiated noise.

The transformer may also create noise which can be minimized

by avoiding cores with long narrow legs (high mechanical

resonant frequency). For example, RM cores produce less

audible noise than EE cores for the same ﬂux density. Reducing

the core ﬂux density will also reduce the noise. Reducing the

maximum ﬂux density (BM) to 1±00 Gauss usually eliminates

any audible noise but must be balanced with the increased core

size needed for a given output power.

Thermal and Lifetime Considerations

Lighting applications present thermal challenges to the driver.

In many cases the LED load dissipation determines the working

ambient temperature experienced by the drive so thermal

evaluation should be performed with the driver inside the ﬁnal

enclosure. Temperature has a direct impact on driver and LED

Secondary-Side Connections

The output rectiﬁer and output ﬁlter capacitor should be as

close as possible. The transformer’s output return pin should

have a short trace to the return side of the output ﬁlter capacitor.

BYPASS Pin

Capacitor Clamp Transformer

LYT4317E

Output

Diode

Input EMI Filter

Bullk

Capacitor

Output

Capacitor

REFERENCE Pin

Resistor

FEEDBACK Pin

Resistor

Output

Capacitors

VOLTAGE MONITOR Pin

Resistor

PI-6904-072313

Figure 13. DER-350 20 W Layout Example, Top Silk / Bottom Layer.

11

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Quick Design Checklist

Maximum Drain Voltage

Verify that the peak V_DSdoes not exceed 72± V under all

operating conditions including start-up and fault conditions.

Maximum Drain Current

Measure the peak drain current under all operation conditions

including start-up and fault conditions. Look for signs of

transformer saturation (usually occurs at highest operating

ambient temperatures). Verify that the peak current is less than

the stated Absolute Maximum Rating in the data sheet.

Thermal Check

At maximum output power, both minimum and maximum line

voltage and ambient temperature; verify that temperature

speciﬁcations are not exceeded for the LYTSwitch-4,

transformer, output diodes, output capacitors and drain clamp

components.

12

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Absolute Maximum Ratings^(1,4)

DRAIN Pin Peak ꢀurrent^(±): LYT4x11 .................................1.37 A Operating Junction Temperature⁽²⁾.........................-40 to 1±0 °ꢀ

LYT4x12 .................................2.08 A

LYT4x13 .................................2.72 A Notes:

LYT4x14 ................................ 4.08 A 1. All voltages referenced to SOURꢀE, T_A= 6± °ꢀ.

LYT4x1± ................................ ±.44 A 2. Normally limited by internal circuitry.

LYT4x16 ................................ 6.88 A 3. 1/16 in. from case for ± seconds.

LYT4x17 ................................. 7.73 A 4. Absolute Maximum Ratings speciﬁed may be applied, one

LYT4x18 ................................ 9.00 A

DRAIN Pin Voltage ………………………................. -0.3 to 72± V

BYPASS Pin Voltage ................................................. -0.3 to 9 V

at a time without causing permanent damage to the

product. Exposure to Absolute Maximum Ratings for

extended periods of time may affect product reliability.

BYPASS Pin ꢀurrent ………………………...................... 100 mA ±. Peak DRAIN current is allowed while the DRAIN voltage is

VOLTAGE MONITOR Pin Voltage.............................-0.3 to 9 V⁽⁶⁾

simultaneously less than 400 V. See also Figure 13.

FEEDBAꢀK Pin Voltage …….. .................................. -0.3 to 9 V 6. During start-up (the period before the BYPASS pin begins

REFERENꢀE Pin Voltage .......................................... -0.3 to 9 V

Lead Temperature⁽³⁾........................................................260 °ꢀ

Storage Temperature …………………................... -6± to 1±0 °ꢀ

powering the Iꢀ) the VOLTAGE MONITOR pin voltage can

safely rise to 1± V without damage.

Thermal Resistance

Thermal Resistance: E Package

Notes:

(q_JA) ....................................................10± °ꢀ/W⁽¹⁾1. Free standing with no heat sink.

(q_Jꢀ).................................................... 2 °ꢀ/W⁽²⁾2. Measured at back surface tab.

Conditions

SOURꢀE = 0 V; T_J= -20 °ꢀ to 12± °ꢀ

(Unless Otherwise Speciﬁed)

Parameter

Symbol

Min

Typ

Max

Units

Control Functions

Average

T_J= 6± °ꢀ

124

132

±.4

140

Switching Frequency

f_OSꢀ

kHz

Peak-Peak Jitter

Frequency Jitter

Modulation Rate

T_J= 6± °ꢀ

See Note B

f_M

2.6

LYT4x11

-4.1

-7.3

-12

-3.4

-6.1

-2.7

-4.9

-7.0

-8.3

-0.43

-1.7

-3.1

-4.2±

LYT4x12

V_BP= 0 V,

I_ꢀH1

T_J= 6± °ꢀ

LYT4x13-4x17

-9.±

LYT4x18

LYT4x11

-13.3

-0.8±

-3.±

-6.±

-7.±

-10.8

-0.62

-2.4

BYPASS Pin

Charge Current

mA

LYT4x12

V_BP= ± V,

I_ꢀH2

T_J= 6± °ꢀ

LYT4x13-4x17

-4.3±

-±.±

LYT4x18

See Note A, B

Charging Current

Temperature Drift

0.7

5/°ꢀ

BYPASS Pin Voltage

V_BP

0 °ꢀ < T_J< 100 °ꢀ

±.7±

±.9±

0.8±

6.1±

6.6

V

BYPASS Pin

Voltage Hysteresis

V_BP(H)

BYPASS Pin

Shunt Voltage

I_BP= 4 mA

0 °ꢀ < T_J< 100 °ꢀ

V_BP(SHUNT)

t_SOFT

6.1

±±

6.4

76

V

T_J= 6± °ꢀ

Soft-Start Time

ms

V

_BP= ±.9 V

13

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Conditions

SOURꢀE = 0 V; T_J= -20 °ꢀ to 12± °ꢀ

Parameter

Symbol

Min

Typ

Max

Units

(Unless Otherwise Speciﬁed)

Control Functions (cont.)

0 °ꢀ < T_J< 100 °ꢀ

FET Not Switching

I_ꢀD2

I_ꢀD1

0.±

1

0.8

2.±

1.2

4

Drain Supply Current

mA

0 °ꢀ < T_J< 100 °ꢀ

FET Switching at f_OSꢀ

VOLTAGE MONITOR Pin

T_J= 6± °ꢀ

R = 24.9 kW

R_R^R= 49.9 kW

Threshold

Hysteresis

11±

123

6

131

Line Overvoltage

Threshold

I_OV

µA

VOLTAGE MONITOR

Pin Voltage

0 °ꢀ < T_J< 100 °ꢀ

V_V

2.7±

16±

0.±

3.0

3.2±

20±

V

µA

V

I_V< I_OV

VOLTAGE MONITOR Pin

Short-Circuit Current

V_V= ± V

T_J= 6± °ꢀ

I_V(Sꢀ)

18±

Remote ON/OFF

Threshold

V_V(REM)

T_J= 6± °ꢀ

FEEDBACK Pin

FEEDBACK Pin Current

at Onset of Maximum

Duty Cycle

I_FB(DꢀMAXR)

0 °ꢀ < T_J< 100 °ꢀ

90

µA

FEEDBACK Pin Current

Skip Cycle Threshold

I_FB(SKIP)

Dꢀ_MAX

V_FB

210

90

µA

5

V

I_FB(DꢀMAXR)< I_FB< I_FB(SKIP)

0 °ꢀ < T_J< 100 °ꢀ

Maximum Duty Cycle

FEEDBACK Pin Voltage

99.9

2.±6

480

I_FB= 1±0 µA

0 °ꢀ < T_J< 100 °ꢀ

2.1

2.3

FEEDBACK Pin

Short-Circuit Current

V_FB= ± V

T_J= 6± °ꢀ

I_FB(Sꢀ)

320

17

400

µA

Dꢀ10

Dꢀ40

Dꢀ60

I_FB= I_FB(AR), T_J= 6± °ꢀ, See Note B

I_FB= 40 µA, T_J= 6± °ꢀ

Duty Cycle Reduction

34

±±

5

I_FB= 60 µA, T_J= 6± °ꢀ

Auto-Restart

T_J= 6± °ꢀ

Auto-Restart ON-Time

t_AR

±±

76

2±

ms

5

V_BP= ±.9 V

T_J= 6± °ꢀ

See Note B

Auto-Restart

Duty Cycle

Dꢀ_AR

t_ON(SOA)

I_FB(AR)

SOA Minimum Switch

ON-Time

T_J= 6± °ꢀ

See Note B

0.87±

10

µs

µA

FEEDBACK Pin Current

During Auto-Restart

0 °ꢀ < T_J< 100 °ꢀ

6.±

14

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Conditions

SOURꢀE = 0 V; T_J= -20 °ꢀ to 12± °ꢀ

Parameter

Symbol

Min

Typ

Max

Units

(Unless Otherwise Speciﬁed)

REFERENCE Pin

Voltage

V_R

I_R

1.223

48.69

1.24±

49.94

1.273

±1.19

V

R_R= 24.9 kW

0 °ꢀ < T_J< 100 °ꢀ

REFERENCE Pin

Current

µA

Current Limit/Circuit Protection

di/dt = 174 mA/µs

di/dt = 22± mA/µs

di/dt = 320 mA/µs

di/dt = 3±0 mA/µs

di/dt = 426 mA/µs

di/dt = 133 mA/µs

di/dt = 19± mA/µs

di/dt = 192 mA/µs

di/dt = 240 mA/µs

di/dt = 33± mA/µs

di/dt = 380 mA/µs

di/dt = 483 mA/µs

di/dt = 930 mA/µs

LYT4x12

LYT4x13

LYT4x14

LYT4x1±

LYT4x16

LYT4x17

LYT4x11

LYT4x12

LYT4x13

LYT4x14

LYT4x1±

LYT4x16

LYT4x17

LYT4x18

1.00

1.24

1.46

1.76

2.43

3.26

0.74

0.81

1.00

1.19

1.17

1.44

1.70

2.04

2.83

3.79

0.86

0.9±

1.16

1.38

1.66

2.0±

2.73

±.70

Full Power

Current Limit

(C_BP= 4.7 µF)

I_LIMIT(F)

A

T = 6± °ꢀ

J

Reduced Power

Current Limit

(C_BP= 47 µF)

I_LIMIT(R)

A

T = 6± °ꢀ

1.43

1.76

2.3±

4.90

J

Minimum ON-Time

Pulse

t_LEB+ t_IL(D)

t_LEB

T_J= 6± °ꢀ

300

1±0

±00

700

±00

ns

°ꢀ

Leading Edge

Blanking Time

T_J= 6± °ꢀ

See Note B

T_J= 6± °ꢀ

See Note B

Current Limit Delay

t_IL(D)

1±0

1±±

±6

Thermal Shutdown

Temperature

See Note B

147

164

Thermal Shutdown

Hysteresis

BYPASS Pin Power-Up

Reset Threshold

Voltage

V_BP(RESET)

0 °ꢀ < T_J< 100 °ꢀ

2.2±

3.30

4.2±

V

15

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Conditions

SOURꢀE = 0 V; T_J= -20 °ꢀ to 12± °ꢀ

Parameter

Output

Symbol

Min

Typ

Max

Units

(Unless Otherwise Speciﬁed)

T_J= 6± °ꢀ

LYT4x11

11.±

13.±

6.9

8.4

±.3

6.3

3.4

3.9

2.±

3.0

1.9

2.3

1.7

2.0

1.3

1.6

13.2

1±.±

8.0

9.7

6.0

7.3

3.9

4.±

2.9

3.4

2.2

2.7

2.0

2.4

1.±

1.8

I_D= 100 mA

T_J= 100 °ꢀ

T_J= 6± °ꢀ

LYT4x12

I_D= 100 mA

T_J= 100 °ꢀ

T_J= 6± °ꢀ

LYT4x13

I_D= 1±0 mA

T_J= 100 °ꢀ

T_J= 6± °ꢀ

LYT4x14

I_D= 1±0 mA

T_J= 100 °ꢀ

ON-State Resistance

R_DS(ON)

W

T_J= 6± °ꢀ

LYT4x1±

I_D= 200 mA

T_J= 100 °ꢀ

T_J= 6± °ꢀ

LYT4x16

I_D= 2±0 mA

T_J= 100 °ꢀ

T_J= 6± °ꢀ

LYT4x17

I_D= 3±0 mA

T_J= 100 °ꢀ

T_J= 6± °ꢀ

LYT4x18

I_D= 600 mA

T_J= 100 °ꢀ

V_BP= 6.4 V

OFF-State Drain

Leakage Current

I_DSS

V_DS= ±60 V

±0

µA

T_J= 100 °ꢀ

V_BP= 6.4 V

T_J= 6± °ꢀ

Breakdown Voltage

BV_DSS

72±

36

V

Minimum Drain

Supply Voltage

T_J< 100 °ꢀ

Rise Time

Fall Time

t_R

t_F

100

±0

V

Measured in a Typical Flyback

See Note B

ns

NOTES:

A. For speciﬁcations with negative values, a negative temperature coefﬁcient corresponds to an increase in magnitude with increasing

temperature and a positive temperature coefﬁcient corresponds to a decrease in magnitude with increasing temperature.

B. Guaranteed by characterization. Not tested in production.

16

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Typical Performance Characteristics

10000

300

200

100

Scaling Factors:

LYT4x11 0.18

LYT4x12 0.28

LYT4x13 0.38

LYT4x14 0.56

LYT4x15 0.75

LYT4x16 1.00

LYT4x17 1.16

LYT4x18 1.55

LYT4x11 0.18

LYT4x12 0.28

LYT4x13 0.38

LYT4x14 0.56

LYT4x15 0.75

LYT4x16 1.00

LYT4x17 1.16

LYT4x18 1.55

1000

100

10

0

1

100 200 300 400 500 600

0

100 200 300 400 500 600 700

DRAIN Pin Voltage (V)

DRAIN Voltage (V)

Figure 14. Drain Capacitance vs. Drain Pin Voltage.

Figure 15. Power vs. Drain Voltage.

5

4

3

1.2

1

0.8

0.6

0.4

0.2

Scaling Factors:

LYT4x11 0.18

LYT4x12 0.28

LYT4x13 0.38

LYT4x14 0.56

LYT4x15 0.75

LYT4x16 1.00

LYT4x17 1.16

LYT4x18 1.55

2

1

LYT4x28 T_CASE= 25 °C

LYT4x28 T_CASE= 100 °C

0

2

4

6

8

10 12 14 16 18 20

0

100 200 300 400 500 600 700 800

DRAIN Voltage (V)

Figure 16. Drain Current vs. Drain Voltage.

Figure 17. Maximum Allowable Drain Current vs. Drain Voltage.

17

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

eSIP-7C (E Package)

2

C

0.403 (10.24)

0.397 (10.08)

0.264 (6.70)

Ref.

0.081 (2.06)

0.077 (1.96)

A

B

Detail A

2

0.290 (7.37)

Ref.

0.325 (8.25)

0.320 (8.13)

0.198 (5.04) Ref.

0.519 (13.18)

Ref.

0.207 (5.26)

0.187 (4.75)

Pin #1

I.D.

0.140 (3.56)

0.120 (3.05)

0.016 (0.41)

Ref.

3

4

0.047 (1.19)

0.070 (1.78) Ref.

0.016 (0.41)

0.033 (0.84)

0.028 (0.71)

0.010 M 0.25 M C A B

6×

0.050 (1.27)

0.100 (2.54)

3

6×

0.118 (3.00)

SIDE VIEW

0.011 (0.28)

0.020 M 0.51 M C

FRONT VIEW

BACK VIEW

0.100 (2.54)

10° Ref.

All Around

0.021 (0.53)

0.019 (0.48)

0.050 (1.27)

0.020 (0.50)

0.060 (1.52)

Ref.

PIN 1

0.048 (1.22)

0.046 (1.17)

0.155 (3.93)

0.059 (1.50)

0.378 (9.60)

Ref.

0.019 (0.48) Ref.

0.023 (0.58)

0.027 (0.70)

PIN 7

END VIEW

0.059 (1.50)

DETAIL A

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions noted are determined at the outermost extremes of the plastic

0.100 (2.54) 0.100 (2.54)

MOUNTING HOLE PATTERN

(not to scale)

body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but

including any mismatch between the top and bottom of the plastic body.

Maximum mold protrusion is 0.007 [0.18] per side.

3. Dimensions noted are inclusive of plating thickness.

4. Does not include inter-lead flash or protrusions.

5. Controlling dimensions in inches (mm).

PI-4917-020515

Part Ordering Information

• LYTSwitch-4 Product Family

• 4 Series Number

• PFC/Dimming

2

3

PFꢀ No Dimming

PFꢀ Dimming

• Voltage Range

1

Low-Line

• Device Size

• Package Identiﬁer

LYT

4 2 1 3 E

E

eSIP-7ꢀ

18

Rev. E 11/14

www.power.com

LYT4211-4218/4311-4318

Revision

Notes

Date

11/12

A

B

ꢀ

D

E

Initial Release.

ꢀorrected Min and Typ parameter table values on pages 13 and 14.

Updated parameters I_ꢀH1, I_ꢀH2, I_ꢀD1, Dꢀ_AR, I_LIMIT(F), I_LIMIT(R), on pages 13, 14 and 1±.

Updated ﬁgures 1, 3a, 3b, 3c, 3d, 8, 9 and 13.

Added Note 6 to Absolute Maximum Ratings section.

02/13

02/20/13

06/13

10/13

Removed L pin parts, updated I_ꢀH2, BV_DSS, Thermal Shutdown Temperature and Hysteresis parameters per PꢀN-14441.

11/11/14

19

Rev. E 11/14

www.power.com

For the latest updates, visit our website: www.power.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power

Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS

MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD

PARTY RIGHTS.

Patent Information

The products and applications illustrated herein (including transformer construction and circuits external to the products) may be

covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power

Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers

a license under certain patent rights as set forth at http://www.power.com/ip.htm.

Life Support Policy

POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES

OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:

1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii)

whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in

signiﬁcant injury or death to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to

cause the failure of the life support device or system, or to affect its safety or effectiveness.

The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero,

HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are

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e-mail: singaporesales@power.com

LYT4221-4228/4321-4328

™

LYTSwitch-4 High Power LED Driver IC Family

Single-Stage Accurate Primary-Side Constant Current (CC) Controller with

PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options

Product Highlights

• Better than ±±5 ꢀꢀ regulation

• TRIAꢀ dimmable to less than ±5 output

• Fast start-up

• <2±0 ms at full brightness

• <1s at 105 brightness

• High power factor >0.9

AC

IN

LYTSwitch-4

D

S

V

• Easily meets EN61000-3-2

• Less than 105 THD in optimized designs

• Up to 925 efﬁcient

CONTROL

BP

R

FB

• 132 kHz switching frequency for small magnetics

PI-6800-050913

High Performance, Combined Driver, Controller, Switch

The LYTSwitch-4 family enables off-line LED drivers with high

power factor which easily meet international requirements for

THD and harmonics. Output current is tightly regulated with

better than ±±5 ꢀꢀ tolerance¹. Efﬁciency of up to 925 is easily

achieved in typical applications.

Figure 1. Typical Schematic.

Optimized for Different Applications and Power Levels

Part Number

LYT4221-LYT4228

LYT4321-LYT4328

Input Voltage Range

160-308 VAꢀ

TRIAC Dimmable

Supports a Wide Selection of TRIAC Dimmers

No

The LYTSwitch-4 family provides excellent turn-on characteristics

for leading-edge and trailing-edge TRIAꢀ dimming applications.

This results in drivers with a wide dimming range and fast

start-up, even when turning on from a low conduction angle –

large dimming ratio and low “pop-on” current.

160-308 VAꢀ

Yes

Output Power Table^1,2

Low Solution Cost and Long Lifetime

Product⁶

Minimum Output Power³Maximum Output Power⁴

LYTSwitch-4 Iꢀs are highly integrated and employ a primary-side

control technique that eliminates the optoisolator and reduces

component count. This allows the use of low-cost single-sided

printed circuit boards. ꢀombining PFꢀ and ꢀꢀ functions into a

single-stage also helps reduce cost and increase efﬁciency.

The 132 kHz switching frequency permits the use of small,

low-cost magnetics.

LYT4x21E⁵

6 W

12 W

1± W

18 W

22 W

2± W

3± W

±0 W

78 W

LYT4x22E

LYT4x23E

LYT4x24E

LYT4x25E

LYT4x26E

LYT4x27E

LYT4x28E

8 W

9 W

11 W

14 W

19 W

33 W

LED drivers using the LYTSwitch-4 family do not use primary-

side aluminum electrolytic bulk capacitors. This means greatly

extended driver lifetime, especially in bulb and other high

temperature applications.

Table 1. Output Power Table.

Notes:

1. Performance for typical design. See Application Note.

2. ꢀontinuous power in an open frame design with adequate heat sinking; device

local ambient of 70 °ꢀ. Power level calculated assuming a typical LED string

voltage and efﬁciency >805.

3. Minimum output power requires ꢀ_BP= 47 µF.

4. Maximum output power requires ꢀ_BP= 4.7 µF.

±. LYT4321 ꢀ_BP= 47 µF, LYT4221 ꢀ_BP= 4.7 µF.

6. Package: eSIP-7ꢀ (see Figure 2).

eSIP-7ꢀ (E Package)

Figure 2. Package Options.

www.power.com

November 2014

This Product is Covered by Patents and/or Pending Patent Applications.

LYT4221-4228/4321-4328

Topology

Isolated Flyback

Buck

Tapped Buck

Buck-Boost

Isolation

Efﬁciency

885

Cost

High

Low

Middle

Low

THD

Best

Good

Best

Output Voltage

Any

Yes

No

925

895

905

Limited

Any

High-Voltage

Table 2.

Performance of Different Topologies in a Typical Non-Dimmable 10 W High-Line Design.

Typical Circuit Schematic

Key Features

Flyback

Beneﬁts

•

Provides isolated output

Supports widest range of output voltages

Very good THD performance

Limitations

AC

IN

•

Flyback transformer

LYTSwitch-4

CONTROL

D

S

V

•

Overall efﬁciency reduced by parasitic capacitance

and inductance in the transformer

BP

R

FB

•

Larger PꢀB area to meet isolation requirements

•

Requires additional components (primary clamp and bias)

Higher RMS switch and winding currents increases losses

and lowers efﬁciency

PI-6800-050913

Figure 3a. Typical Isolated Flyback Schematic.

Buck

Beneﬁts

•

Highest efﬁciency

Lowest component count – small size

Simple low-cost power inductor

Low drain source voltage stress

Best EMI/lowest component count for ﬁlter

AC

IN

LYTSwitch-4

BP

D

S

V

Limitations

Single input line voltage range

CONTROL

•

R

FB

•

Output voltage <0.6 × V_IN(Aꢀ)× 1.41

Output voltage for low THD designs

Non-isolated

PI-6841-111813

Figure 3b. Typical Buck Schematic.

Tapped Buck

Beneﬁts

•

Ideal for low output voltage designs (<20 V)

High efﬁciency

Low component count

Simple low-cost tapped inductor

LYTSwitch-4

V

AC

Limitations

IN

D

•

Designs best suited for single input line voltage

Requires additional components (primary clamp)

Non-isolated

CONTROL

BP

S

R

FB

PI-6842-111813

Figure 3c. Typical Tapped Buck Schematic.

Buck-Boost

Beneﬁts

•

Ideal for non-isolated high output voltage designs

High efﬁciency

Low component count

Simple common low-cost power inductor can be used

Lowest THD

AC

IN

LYTSwitch-4

BP

D

S

V

Limitations

CONTROL

•

Maximum V_OUTis limited by MOSFET breakdown voltage

Single input line voltage range

Non-isolated

R

FB

PI-6859-111813

Figure 3d. Typical Buck-Boost Schematic.

2

Rev. C 11/14

www.power.com

LYT4221-4228/4321-4328

DRAIN (D)

5.9 V

BYPASS (BP)

REGULATOR

BYPASS

CAPACITOR

SELECT

SOFT-START

TIMER

HYSTERETIC

THERMAL

SHUTDOWN

+

-

FAULT

PRESENT

I_LIM

M_I

5.9 V

5.0 V

AUTO-RESTART

COUNTER

BYPASS PIN

UNDERVOLTAGE

Gate

Driver

1 V

VOLTAGE

MONITOR (V)

SenseFet

LEB

STOP

LOGIC

JITTER

CLOCK

Comparator

OSCILLATOR

-

+

FB_OFF

3-V_T

DC_MAX

OCP

OV

LINE

SENSE

+

-

CURRENT LIMIT

COMPARATOR

I_LIM

I_V

FEEDBACK (FB)

PFC/CC

CONTROL

V_SENSE

V_BG

M_I

I_FB

FB_OFF

FEEDBACK

SENSE

DC_MAX

I_S

REFERENCE

BLOCK

REFERENCE (R)

V_BG

6.4 V

PI-6843-071112

SOURCE (S)

Figure 4. Functional Block Diagram.

VOLTAGE MONITOR (V) Pin:

Pin Functional Description

This pin interfaces with an external input line peak detector,

consisting of a rectiﬁer, ﬁlter capacitor and resistors. The

applied current is used to control stop logic for overvoltage (OV),

provide feed-forward to control the output current and the

remote ON/OFF function.

DRAIN (D) Pin:

This pin is the power FET drain connection. It also provides

internal operating current for both start-up and steady-state

operation.

SOURCE (S) Pin:

This pin is the power FET source connection. It is also the

ground reference for the BYPASS, FEEDBAꢀK, REFERENꢀE

and VOLTAGE MONITOR pins.

E Package (eSIP-7C)

(Top View)

BYPASS (BP) Pin:

Exposed Pad

(Backside) Internally

Connected to

SOURCE Pin (see

eSIP-7C Package

Drawing)

This is the connection point for an external bypass capacitor for

the internally generated ±.9 V supply. This pin also provides

output power selection through choice of the BYPASS pin

capacitor value.

FEEDBACK (FB) Pin:

The FEEDBAꢀK pin is used for output voltage feedback. The

current into the FEEDBAꢀK pin is directly proportional to the

output voltage. The FEEDBAꢀK pin also includes circuitry to

protect against open load and overload output conditions.

PI-7076-062513

REFERENCE (R) Pin:

Figure 5. Pin Conﬁguration.

This pin is connected to an external precision resistor and is

conﬁgured to use only 24.9 kW for non-dimming and dimming.