WV3EG265M72EFSU-D4
White Electronic Designs
ADVANCED
ICC SPECIFICATIONS AND CONDITIONS
VCC, VCCQ = +2.5V 0.2V
MAX
SYM
PARAMETER/CONDITION
UNITS
DDR333
DDR266
@CL=2
DDR266
@CL=2.5
@CL=2.5
ICC0*
OPERATING CURRENT: One device bank; Active-Precharge; tRC = tRC (MIN); tCK = tCK (MIN);
DQ, DM and DQS inputs changing once per clock cycle; Address and control inputs changing
once every two clock cycles
1,270
1,180
1,180
mA
ICC1*
OPERATING CURRENT: One device bank; Active-Read-Precharge; Burst = 4; tRC = tRC (MIN);
tCK = tCK (MIN); IOUT = 0mA; Address and control inputs changing once per clock cycle
1,540
370
1,450
370
1,450
370
mA
mA
mA
ICC2P** PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle; Power-down
mode; tCK = tCK (MIN); CKE = (LOW)
ICC2F** IDLE STANDBY CURRENT: CS# = HIGH; All device banks are idle; tCK = tCK (MIN); CKE =
HIGH; Address and other control inputs changing once per clock cycle. VIN = VREF for DQ,
DQS, and DM
820
820
820
ICC3P** ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active; Power-down mode;
tCK = tCK (MIN); CKE = LOW
820
820
820
mA
mA
ICC3N** ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device bank active; tRC = tRAS
(MAX); tCK = tCK (MIN); DQ, DM and DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
1,090
1,090
1,090
ICC4R* OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One device bank active;
Address and control inputs changing once per clock cycle; tCK = tCK (MIN); IOUT = 0mA
1,585
1,675
1,450
1,495
1,450
1,495
mA
mA
ICC4W* OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device bank active;
Address and control inputs changing once per clock cycle; tCK = tCK (MIN); DQ, DM, and DQS
inputs changing twice per clock cycle
ICC5**
ICC6**
ICC7*
AUTO REFRESH BURST CURRENT:
tREFC = tRFC (MIN)
3,970
370
3,790
370
3,790
370
mA
mA
mA
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four device bank interleaving READs (Burst = 4) with auto
precharge, tRC = minimum tRC allowed; tCK = tCK (MIN); Address and control inputs change only
during Active READ, or WRITE commands
3,565
3,250
3,250
Note: ICC specification is based on SAMSUNG components. Other DRAM Manufacturers specification may be different.
*: Value calculated as one module rank in this operating condition, and all other module ranks in ICC2P (CKE LOW) mode.
**: Value calculated reflects all module ranks in this operating condition.
May 2006
Rev. 0
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
