WV3DG64127V-D2
White Electronic Designs
ADVANCED*
IDD SPECIFICATIONS AND CONDITIONS
VCC, VCCQ = +3.3V 0.3V; SDRAM component values only
Version
75
Parameter
Symbol Test Condition
Unit
Note
7
10
Operating current
(One bank active)
ICC1
Burst length = 1, tRC ≥ tRC(min), IO = 0 mA
2080
1920
1920
mA
mA
1
ICC2P
CKE ≤ VIL(max), tCC = 10ns
64
64
Precharge standby current
in power-down mode
ICC2PS
CKE & CLK ≥ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS# ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2N
640
320
mA
mA
Precharge standby current
in non power-down mode
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC2NS
ICC3P
CKE ≤ VIL(max), tCC = 10ns
200
200
Active standby current in
power-down mode
ICC3PS
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS# ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3N
960
800
mA
mA
Active standby current in
non power-down mode
(One bank active)
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC3NS
IO = 0 mA
Operating current
(Burst mode)
Page burst
ICC4
2240
4000
2240
2080
3520
mA
1
2
4banks Activated.
tCCD = 2CLKs
Refresh current
ICC5
ICC6
tRC ≥ tRC(min)
CKE ≤ 0.2V
3680
96
mA
mA
Self refresh current
C
Notes:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing is CMOS (VIH/VIL = VCCQ/VJSQ
)
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
April 2005
Rev. 0
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
