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ZY1207HG-T3

型号：

ZY1207HG-T3

品牌：

BEL[ BEL FUSE INC. ]

页数：

18 页

PDF大小：

840 K

下载PDF手册
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
Member of the  
Family  
Features  
•
RoHS lead free and lead-solder-exempt products are  
available  
•
•
•
•
•
•
•
Wide input voltage range: 3V–14V  
High continuous output current: 7A  
Wide programmable output voltage range: 0.5V–5.5V  
Active digital current share  
Output voltage margining  
Overcurrent and overtemperature protections  
Overvoltage and undervoltage protections, and Power  
Good signal tracking the output voltage setpoint  
Applications  
•
Low voltage, high density systems with  
Intermediate Bus Architectures (IBA)  
•
•
Programmable power-up delay  
Tracking during turn-on and turn-off with guaranteed  
slew rates  
•
Point-of-load regulators for high performance DSP,  
FPGA, ASIC, and microprocessor applications  
•
•
Sequenced and cascaded modes of operation  
•
•
Desktops, servers, and portable computing  
Single-wire line for frequency synchronization  
between multiple POLs  
Broadband, networking, optical, and  
communications systems  
•
•
•
•
•
•
•
Programmable interleave  
•
Active memory bus terminators  
Programmable feedback loop compensation  
Enable control with programmable polarity  
Flexible fault management and propagation  
Start-up into the load pre-biased up to 100%  
Full rated current sink  
Benefits  
•
•
•
Integrates digital power conversion with intelligent  
power management  
Eliminates the need for external power  
management components and communication bus  
Real time current and temperature measurements,  
monitoring, and reporting  
Completely programmable via pin strapping and  
external R and C  
•
•
•
Small footprint SMT package: 12.5x22mm  
Low profile of 6.5mm  
•
•
One part that covers all applications  
Compatible with conventional pick-and-place  
equipment  
Reduces board space, system cost and  
complexity, and time to market  
•
•
Wide industrial operating temperature range  
UL 60950-1/CSA 22.2 No. 60950-1-07 Second  
Edition, IEC 60950-1: 2005, and EN 60950-1:2006  
Description  
Power-One’s point-of-load converters are recommended for use with regulated bus converters in an Intermediate  
Bus Architecture (IBA). The ZY1207 is an intelligent, fully programmable step-down point-of-load DC-DC module  
integrating digital power conversion and intelligent power management. The ZY1207 completely eliminates the  
need for external components for sequencing, tracking, protection, monitoring, and reporting. Performance  
parameters of the ZY1207 are programmable by pin strapping and external resistor and capacitor and can be  
changed by a user at any time during product development and service without a need for a communication bus.  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 1 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
Reference Documents  
No-BusTM POL Converters. Z-1000 Series Application Note  
Z-One® POL Converters. Eutectic Solder Process Application Note  
Z-One® POL Converters. Lead-Free Process Application Note  
1. Ordering Information  
ZY  
12  
07  
x
y
–
zz  
Product  
family:  
Z-One  
Series:  
No-Bus  
POL  
Output  
Output voltage setpoint  
RoHS compliance:  
No suffix - RoHS  
compliant with Pb  
solder exemption2  
G - RoHS compliant  
for all six substances  
Dash  
Packaging Option3:  
T1 – 500pcs T&R  
T2 – 100pcs T&R  
T3 – 50pcs T&R  
Current: accuracy:  
No suffix – 1.5% or 35mV,  
7A  
Module  
Converter  
whichever is greater.  
H1 – 1.5% or 20mV,  
whichever is greater  
Q1 – 1pc sample for  
evaluation only  
K1 – 1pc mounted on  
the evaluation board4  
______________________________________  
1
Contact factory for availability.  
2
The solder exemption refers to all the restricted materials except lead in solder. These materials are Cadmium (Cd), Hexavalent chromium  
(Cr6+), Mercury (Hg), Polybrominated biphenyls (PBB), Polybrominated diphenylethers (PBDE), and Lead (Pb) used anywhere except in  
solder.  
3
Packaging option is used only for ordering and not included in the part number printed on the POL converter label.  
4
The evaluation board is available in only one configuration: ZY1207-K1.  
Example: ZY1207HG-T2: A 100-peices reel of RoHS compliant POL converters with the output voltage setpoint  
of 1.5% or 20mV, whichever is greater. Each POL converter is labeled ZY1207HG.  
2. Absolute Maximum Ratings  
Stresses in excess of the absolute maximum ratings may cause performance degradation, adversely affect long-  
term reliability, and cause permanent damage to the POL converter.  
Parameter  
Operating Temperature  
Input Voltage  
Conditions/Description  
Controller Case Temperature  
250ms Transient  
Min  
Max  
105  
15  
Units  
°C  
-40  
VDC  
ADC  
Output Current  
(See Output Current Derating Curves)  
-7  
7
3. Environmental and Mechanical Specifications  
Parameter  
Ambient Temperature Range  
Storage Temperature (Ts)  
Weight  
Conditions/Description  
Min  
Nom  
Max  
85  
Units  
-40  
-55  
°C  
°C  
125  
8
grams  
MHrs  
MTBF  
Calculated Per Telcordia Technologies SR-332  
6.24  
ZY1207  
ZY1207G  
220  
260  
°C  
°C  
Peak Reflow Temperature  
Lead Plating  
245  
100% Matte Tin or  
1.5µm Ag over 1.5µm Ni  
ZY1207 and ZY1207G  
ZY1207  
ZY1207G  
2
3
Moisture Sensitivity Level  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 2 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
4. Electrical Specifications  
Specifications apply at the input voltage from 3V to 14V, output load from 0 to 7A, ambient temperature from -40°C  
to 85°C, output capacitance consisting of 110µF ceramic and 220µF tantalum, and default performance  
parameters settings unless otherwise noted.  
4.1  
Input Specifications  
Parameter  
Conditions/Description  
Min  
Nom  
Max  
Units  
VDC  
At VIN<4.75V, VLDO pin needs to be  
connected to an external voltage source  
higher than 4.75V  
Input voltage (VIN)  
3
14  
Input Current (at no load)  
50  
mADC  
VIN≥4.75V, VLDO pin connected to VIN  
Undervoltage Lockout (VLDO  
connected to VIN)  
Ramping Up  
Ramping Down  
4.00  
3.9  
VDC  
VDC  
Undervoltage Lockout (VLDO  
connected to VAUX=5V)  
Ramping Up  
Ramping Down  
2.8  
2.7  
VDC  
VDC  
External Low Voltage Supply  
VLDO Input Current  
Connect to VLDO pin when VIN<4.75V  
4.75  
14  
VDC  
Current drawn from the external low  
voltage supply at VLDO=5V  
50  
mADC  
4.2  
Output Specifications  
Parameter  
Conditions/Description  
Min  
Nom  
Max  
Units  
Output Current (IOUT  
)
VIN MIN to VIN MAX  
Programmable2 with a resistor between  
TRIM and REF pins  
-71  
7
ADC  
VDC  
0.5  
5.5  
Output Voltage Range (VOUT  
)
Default (no resistor)  
0.5  
VDC  
Output Voltage Setpoint  
Accuracy3  
VIN=12V, IOUT=0.5*IOUT MAX, room  
temperature  
See Ordering Information  
Line Regulation3  
Load Regulation3  
VIN MIN to VIN MAX  
0 to IOUT MAX  
±0.2  
±0.2  
%VOUT  
%VOUT  
Dynamic Regulation  
Peak Deviation  
Peak Deviation  
Settling Time  
Slew rate 1A/µs, 50-75% load step,  
VIN≥5V  
mV  
mV  
µs  
75  
100  
30  
VIN=3.3V  
to 10% of peak deviation  
Output Voltage Peak-to-Peak  
Ripple and Noise  
BW=20MHz  
VIN=5.0V, VOUT≤2.5V  
VIN=5.0V, VOUT>2.5V  
VIN=12V, VOUT≤2.5V  
VIN=12V, VOUT>2.5V  
15  
25  
25  
40  
mV  
mV  
mV  
mV  
Full Load  
Temperature Coefficient  
Switching Frequency  
VIN=12V, IOUT=0.5*IOUT MAX  
50  
ppm/°C  
kHz  
450  
500  
550  
1
At the negative output current (bus terminator mode) efficiency of the ZY1207 degrades resulting in increased internal power dissipation.  
Therefore maximum allowable negative current under specific conditions is 20% lower than the current determined from the derating curves  
shown in paragraph 5.5.  
2
ZY1207 is a step-down converter, thus the output voltage is always lower than the input voltage as show in Figure 1.  
3
Digital PWM has an inherent quantization uncertainty of ±6.25mV that is not included in the specified static regulation parameters.  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 3 of 18  
 
 
 
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
VOUT [V]  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
Min Load 0.2A  
3.0  
3.3  
6.25  
5.5  
VIN [V]  
2.0  
4.0  
8.0  
6.0  
10.0  
12.0  
14.0  
Figure 1. Output Voltage as a Function of Input Voltage and Output Current  
4.3  
Protection Specifications  
Parameter  
Conditions/Description  
Output Overcurrent Protection  
Min  
-25  
-2  
Nom  
Max  
Units  
Type  
Non-Latching, 130ms period  
140  
Threshold  
%IOUT  
Threshold Accuracy  
25  
%IOCP.SET  
Output Overvoltage Protection  
Type  
Latching  
Threshold  
Follows the output voltage setpoint  
Measured at VO.SET=2.5V  
1301  
6
%VO.SET  
Threshold Accuracy  
2
%VOVP.SET  
From instant when threshold is exceeded until  
the turn-off command is generated  
Delay  
μs  
Output Undervoltage Protection  
Type  
Non-Latching, 130ms period  
Threshold  
Follows the output voltage setpoint  
Measured at VO.SET=2.5V  
75  
%VO.SET  
Threshold Accuracy  
-2  
2
%VUVP.SET  
From instant when threshold is exceeded until  
the turn-off command is generated  
Delay  
6
μs  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 4 of 18  
 
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
Overtemperature Protection  
Type  
Non-Latching, 130ms period  
120  
Turn Off Threshold  
Temperature is increasing  
°C  
°C  
°C  
μs  
Temperature is decreasing after module was  
shut down by OTP  
Turn On Threshold  
Threshold Accuracy  
Delay  
110  
-5  
5
From instant when threshold is exceeded until  
the turn-off command is generated  
6
Power Good Signal (PGOOD pin)  
VOUT is inside the PG window and stable  
VOUT is outside of the PG window or ramping  
up/down  
High  
Logic  
N/A  
Low  
90  
Lower Threshold  
Upper Threshold  
Follows the output voltage setpoint  
Follows the output voltage setpoint  
%VO.SET  
%VO.SET  
110  
6
From instant when threshold is exceeded until  
status of PG signal changes  
Delay  
μs  
Threshold Accuracy  
Measured at VO.SET=2.5V  
-2  
2
%VO.SET  
___________________  
1
Minimum OVP threshold is 1.0V  
4.4  
Feature Specifications  
Parameter  
Conditions/Description  
Current Share (CS pin)  
Min  
Nom  
Max  
Units  
Type  
Active, Single Line  
Maximum Number of Modules  
Connected in Parallel  
IOUT MIN=0  
4
Current Share Accuracy  
IOUT MIN≥20%*IOUT NOM  
±20  
%IOUT  
Interleave (IM and INTL2…INTL4 pins)  
Programmable via INTL2…INTL4 pins in  
Interleave (Phase Lag)  
0
315  
degree  
45° steps  
Sequencing (DELAY pin)  
Programmable by capacitor connected to  
DELAY pin  
210  
ms  
ms  
Power-Up Delay  
Default: CDELAY=0  
0
Tracking  
Rising Slew Rate  
Falling Slew Rate  
Proportional to SYNC frequency  
Proportional to SYNC frequency  
0.1  
V/ms  
V/ms  
-0.5  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 5 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
Enable (EN and ENP pins)  
ENP pin is pulled low  
Negative (enables the output when EN pin is  
pulled low)  
EN Pin Polarity  
ENP pin is open  
Positive (enables the output when EN pin is  
open or pulled high)  
EN High Threshold  
EN Low Threshold  
Open Circuit Voltage  
2.3  
VDC  
VDC  
VDC  
1.0  
EN and ENP  
3.3  
0
From EN pin changing state to VOUT  
starting to ramp up  
From EN pin changing state to VOUT  
reaching 0V  
Turn-On Delay  
Turn-Off Delay  
ms  
ms  
11  
Feedback Loop Compensation (CCA0…CCA2 pins)  
Recommended VIN range  
Recommended COUT/ESR range,  
combination of ceramic+ tantalum  
Recommended VIN range  
Recommended COUT range, tantalum  
Recommended ESR range, tantalum  
Recommended VIN range  
8
50/5 +  
220/40  
8
440  
40  
12  
100/5 +  
470/40  
12  
880  
25  
12  
220/5  
5
14  
400/5 +  
2000/20  
14  
10,000  
10  
14  
400/5  
5.5  
VDC  
µF/mΩ  
µF/mΩ  
VDC  
µF  
mΩ  
VDC  
CCA=7 (default)  
CCA=6  
CCA=5  
8
Recommended COUT/ESR range, ceramic  
Recommended VIN range  
100/5  
3
µF/mΩ  
VDC  
CCA=3 or CCA=4  
Recommended COUT/ESR range,  
combination of ceramic + tantalum  
Recommended VIN range  
50/5 +  
220/40  
3
100/25  
3
100/5 +  
470/40  
5
440/20  
5
200/5 +  
880/40  
5.5  
1,000/10  
5.5  
µF/mΩ  
µF/mΩ  
VDC  
µF/mΩ  
VDC  
CCA=2  
CCA=1  
Recommended COUT/ESR range, tantalum  
Recommended VIN range  
Recommended COUT/ESR range, ceramic  
100/5  
220/5  
400/5  
µF/mΩ  
Recommended VIN range  
Recommended COUT/ESR range,  
combination of ceramic+ tantalum  
6
11  
200/5 +  
880/40  
VDC  
µF/mΩ  
µF/mΩ  
CCA=0  
50/5 +  
220/40  
100/5 +  
470/40  
Output Current Monitoring (CS pin)  
Output Current Monitoring  
Accuracy  
20%*IOUT NOM < IOUT < IOUT NOM  
VIN=12V  
-20  
+20  
%IOUT  
%
Duty Cycle of the negative pulse  
corresponding to 100% of nominal current  
Conversion Ratio  
70  
Temperature Monitoring (TEMP pin)  
Temperature Monitoring  
Accuracy  
Junction temperature of POL controller  
-5  
+5  
2
°C  
mV/°C  
VDC  
kΩ  
Conversion Ratio  
Monitoring Voltage Range  
Output Impedance  
Junction temperature from -40°C to 140°C  
10  
Corresponds to -40°C to 140°C junction  
temperature range  
0.2  
TEMP pin  
6.4  
Remote Voltage Sense (+VS pin)  
Between +VS and VOUT  
Voltage Drop Compensation  
300  
mV  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 6 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
4.5  
Signal Specifications  
Parameter  
Conditions/Description  
Min  
Nom  
Max  
Units  
VDD  
Internal supply voltage  
3.15  
3.3  
3.45  
V
SYNC Line  
ViL_s  
ViH_s  
LOW level input voltage  
HIGH level input voltage  
-0.5  
0.3 x VDD  
VDD + 0.5  
V
V
0.75 x  
VDD  
0.25 x  
VDD  
0.45 x  
VDD  
Vhyst_s  
Hysteresis of input Schmitt trigger  
V
IoL_s  
Ipu_s  
LOW level sink current V(SYNC)=0.5V  
Pull-up current source V(SYNC)=0V  
Maximum allowed rise time 10/90%VDD  
Added node capacitance  
14  
60  
1000  
300  
10  
mA  
μA  
ns  
300  
Tr_s  
Cnode_s  
Freq_s  
5
pF  
Clock frequency of external SYNC line  
475  
22  
525  
kHz  
% of clock  
cycle  
% of clock  
cycle  
Tsynq  
T0  
Sync pulse duration  
28  
78  
Data=0 pulse duration  
72  
Inputs: INTL2…INTL4, CCA0…CCA2, EN, ENP, IM  
Iup_x  
ViL_x  
Pull-up current source V(X)=0  
LOW level input voltage  
25  
110  
μA  
V
-0.5  
0.3 x VDD  
VDD+0.5  
0.3 x VDD  
ViH_x  
HIGH level input voltage  
0.7 x VDD  
0.1 x VDD  
V
Vhyst_x  
Hysteresis of input Schmitt trigger  
V
External pull down resistance  
pin forced low  
RdnL_x  
10  
kOhm  
Power Good and OK Inputs/Outputs  
Iup_PG  
Iup_OK  
ViL_x  
Pull-up current source V(PG)=0  
Pull-up current source V(OK)=0  
LOW level input voltage  
25  
175  
110  
725  
μA  
μA  
V
-0.5  
0.3 x VDD  
VDD+0.5  
0.3 x VDD  
20  
ViH_x  
HIGH level input voltage  
0.7 x VDD  
0.1 x VDD  
4
V
Vhyst_x  
IoL_x  
Hysteresis of input Schmitt trigger  
LOW level sink current at 0.5V  
V
mA  
Current Share/Sense Bus  
Iup_CS  
ViL_CS  
Pull-up current source at V(CS)=0V  
LOW level input voltage  
0.84  
-0.5  
3.10  
mA  
V
0.3 x VDD  
0.75 x  
VDD  
0.25 x  
VDD  
ViH_CS  
HIGH level input voltage  
VDD+0.5  
V
V
0.45 x  
VDD  
Vhyst_CS  
Hysteresis of input Schmitt trigger  
IoL_CS  
Tr_CS  
LOW level sink current V(CS)=0.5V  
14  
60  
mA  
ns  
Maximum allowed rise time 10/90% VDD  
100  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 7 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
5. Typical Performance Characteristics  
94  
92  
90  
88  
86  
84  
82  
80  
78  
5.1  
Efficiency Curves  
95  
90  
85  
80  
75  
70  
65  
60  
55  
Vo=1.2V  
Vo=3.3V  
Vo=2.5V  
Vo=5.0V  
76  
74  
0
1
2
3
4
5
6
7
Vo=0.5V  
Vo=1.2V  
4
Vo=2.5V  
6
Output Current, A  
0
1
2
3
5
7
Output Current, A  
Figure 4. Efficiency vs. Load. Vin=9.6V  
Figure 2. Efficiency vs. Load. Vin=3.3V  
92  
90  
88  
86  
84  
82  
80  
78  
76  
74  
72  
70  
95  
90  
85  
80  
75  
70  
65  
60  
Vo=1.2V  
Vo=3.3V  
Vo=2.5V  
Vo=5.0V  
Vo=0.5V  
Vo=2.5V  
Vo=1.2V  
Vo=3.3V  
0
1
2
3
4
5
6
7
Output Current, A  
0
1
2
3
4
5
6
7
Output Current, A  
Figure 5. Efficiency vs. Load. Vin=12V  
Figure 3. Efficiency vs. Load. Vin=5V  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 8 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
95  
90  
85  
80  
75  
70  
65  
60  
55  
5.2  
Turn-On Characteristics  
Vin=5V  
Vin=3.3V  
Vin=12V  
Vin=9.6V  
0.5  
1.5  
2.5  
3.5  
4.5  
5.5  
Output Voltage, V  
Figure 8. Tracking Turn-On.  
Vin=12V, Ch1 – V1, Ch2 – V2, Ch3 – V3  
Figure 6. Efficiency vs. Output Voltage, Iout=7A  
5.3  
Turn-Off Characteristics  
90  
85  
80  
75  
70  
65  
60  
55  
50  
Vo=0.5V  
Vo=1.2V  
Vo=2.5V  
3
4
5
6
7
8
9
10 11 12 13 14  
Input Voltage, V  
Figure 9. Tracking Turn-Off  
Vin=12V, Ch1 – V1, Ch2 – V2, Ch3 – V3  
Figure 7. Efficiency vs. Input Voltage. Iout=7A  
5.4  
Transient Response  
The pictures in Figure 10 - Figure 15 show the  
deviation of the output voltage in response to the 50-  
75-50% step load at 1.0A/μs. In all tests the POL  
converters had 5x22μF ceramic capacitors and a  
220μF tantalum capacitor connected across the  
output pins. The speed of the transient response  
was optimized by selecting appropriate CCA  
settings.  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 9 of 18  
 
 
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
Figure 10. Vin=12V, Vout=1V. CCA=00  
Figure 11. Vin=12V, Vout=2.5V. CCA=00  
Figure 12. Vin=12V, Vout=5V, CCA=00  
Figure 13. Vin=5V, Vout=1V. CCA=03  
Figure 14. Vin=5V, Vout=2.5V. CCA=03  
Figure 15. Vin=3.3V, Vout=1V. CCA=03  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 10 of 18  
 
 
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
5.5  
Thermal Derating Curves  
7
6.5  
6
5.5  
5
4.5  
4
3.5  
0LFM  
3
100LFM  
55  
200LFM  
65  
400LFM  
75  
600LFM  
45  
85  
Ambient Temperature, Degree C  
Figure 16. Thermal Derating Curves. Vin=12V, Vout=5.0V  
7
6.5  
6
5.5  
5
4.5  
4
3.5  
0LFM  
100LFM  
55  
200LFM  
65  
400LFM  
600LFM  
3
45  
75  
85  
Ambient Temperature, Degree C  
Figure 17. Thermal Derating Curves. Vin=14V, Vout=5.0V  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 11 of 18  
 
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
6. Typical Application  
IBV  
ENABLE  
CS  
SYNC  
OK  
PGOOD  
TEMP  
CS  
SYNC  
OK  
PGOOD  
TEMP  
TRIM  
VREF  
TRIM  
VREF  
VLDO  
VIN  
VLDO  
VIN  
EN  
EN  
VIN  
VIN  
VIN  
VIN  
ENP  
ENP  
VIN  
VIN  
VIN  
VIN  
CCA2  
CCA1  
CCA0  
CCA2  
CCA1  
CCA0  
22uF 4.7uF 4.7uF  
22uF 4.7uF 4.7uF  
POL2  
POL4  
+VS  
VOUT  
VOUT  
VOUT  
VOUT  
VOUT  
+VS  
VOUT  
VOUT  
VOUT  
VOUT  
VOUT  
INTL4  
INTL3  
INTL2  
INTL4  
INTL3  
INTL2  
Vo2  
47uF  
220uF  
47uF  
47uF  
220uF  
47uF  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
IM  
IM  
DELAY  
DELAY  
CS  
SYNC  
OK  
PGOOD  
TEMP  
CS  
SYNC  
OK  
PGOOD  
TEMP  
TRIM  
VREF  
TRIM  
VREF  
VLDO  
VIN  
VLDO  
VIN  
EN  
EN  
VIN  
VIN  
VIN  
VIN  
ENP  
ENP  
VIN  
VIN  
VIN  
VIN  
CCA2  
CCA1  
CCA0  
CCA2  
CCA1  
CCA0  
22uF 4.7uF 4.7uF  
22uF 4.7uF 4.7uF  
POL3  
POL1  
+VS  
VOUT  
VOUT  
VOUT  
VOUT  
VOUT  
+VS  
VOUT  
VOUT  
VOUT  
VOUT  
VOUT  
INTL4  
INTL3  
INTL2  
INTL4  
INTL3  
INTL2  
Vo3  
Vo1  
47uF  
47uF  
220uF  
47uF  
47uF  
220uF  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
PGND  
IM  
IM  
DELAY  
DELAY  
Figure 18. Complete Schematic of Application with Three Independent Outputs. Intermediate Bus Voltage is from 8V to 14V.  
In this application four POL converters are configured to deliver three independent output voltages. POL1 and  
POL2 are connected in parallel for increased output current. Output voltages are programmed with the resistors  
connected between TRIM and VREF pins of individual converters.  
POL1 is configured as a master (IM and INTL0…INTL4 pins are grounded) and all other POL converters are  
synchronized to the switching frequency of POL1. Interleave is programmed with pins INTL0…INTL4 to ensure  
the lowest input and output noise. POL2 has 180° phase shift, POL 3 and POL4 have phase shifts of 270° and  
90° respectively.  
All converters are controlled by the common ENABLE signal. Turn-on and turn-off processes of the system are  
illustrated by pictures in Figure 8 and Figure 9.  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 12 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
7. Pin Assignments and Description  
Pin  
Name  
Pin  
No.  
Pin  
Type  
Buffer  
Type  
Pin Description  
Notes  
Connect to an external voltage source higher  
VLDO  
1
P
Low Voltage Dropout  
than 4.75V, if VIN<4.75V. Connect to VIN, if  
VIN≥4.75V  
Compensation Coefficient Address  
CCA0  
CCA1  
CCA2  
TEMP  
ENP  
2
3
4
5
6
I
I
PU  
PU  
PU  
Tie to PGND for 0 or leave open for 1  
Tie to PGND for 0 or leave open for 1  
Tie to PGND for 0 or leave open for 1  
Bit 0  
Compensation Coefficient Address  
Bit 1  
Compensation Coefficient Address  
Bit 2  
I
Analog voltage proportional to junction  
temperature of the controller  
Tie to PGND for Negative logic or leave open  
for Positive logic  
A
I
Temperature Measurement  
Enable Logic Selection  
PU  
INTL2  
INTL3  
INTL4  
7
8
9
I
I
I
PU  
PU  
PU  
Interleave Bit 2  
Interleave Bit 3  
Interleave Bit 4  
Tie to PGND for 0 or leave open for 1  
Tie to PGND for 0 or leave open for 1  
Tie to PGND for 0 or leave open for 1  
Connect to CS pin of other Z-POLs connected  
in parallel  
CS  
10  
I/O  
PU  
Current Share/Sense  
To program the output voltage, connect a  
resistor between VREF and TRIM  
TRIM  
PGOOD  
SYNC  
11  
12  
13  
A
Output Voltage Trim  
Power Good  
I/O  
I/O  
PU  
PU  
Connect to SYNC pin of other Z-POLs and/or  
to an external clock generator  
Frequency Synchronization Line  
Connect to OK pin of other Z-1000 POLs.  
Leave open, if not used  
OK  
EN  
14  
15  
16  
I/O  
I
PU  
PU  
Fault Status  
Enable  
Polarity is determined by ENP pin  
To program the output voltage, connect a  
resistor between VREF and TRIM  
VREF  
A
Voltage Reference  
Tie to PGND for master or leave open to set  
interleave by INTL0…INTL4 pins  
Connect a capacitor between the pin and  
PGND to program the Power-Up delay. Leave  
open for zero delay  
IM  
17  
18  
I
PU  
Interleave Mode  
Power-Up Delay  
DELAY  
A
19-  
23  
VOUT  
+VS  
P
I
Output Voltage  
Positive Voltage Sense  
Power Ground  
24  
PU  
Connect to the positive point close to the load  
25-  
31  
PGND  
P
32-  
36  
VIN  
P
Input Voltage  
Legend: I=input, O=output, I/O=input/output, P=power, A=analog, PU=internal pull-up  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 13 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
fault occurs. Pulling low the OK input by an external  
circuitry turns off the POL converter.  
8. Pin and Feature Description  
8.1 VLDO, Low Voltage Dropout  
8.10 SYNC, Frequency Synchronization Line  
The input of the internal linear regulator. VVLDO  
always needs to be greater than 4.75V for normal  
operation of the POL converter.  
The bidirectional input/output with the internal pull-up  
resistor. If the POL converter is configured as a  
master, the SYNC line propagates clock to other  
POL converters. If the POL converter is configured  
as a slave, the internal clock recovery circuit  
synchronizes the POL converter to the clock of the  
SYNC line.  
8.2  
IM, Interleave Mode  
The input with the internal pull-up resistor. When the  
pin is left floating, the phase lag of the POL converter  
is set by INTL2…INTL4 pins. If the pin is pulled low,  
the phase lag is set to 0°. Pulling all INTL pins and  
the IM pin low configures a POL converter as a  
master. The master determines the clock on the  
SYNC line.  
8.11 PG, Power Good  
The open drain input/output with the internal pull-up  
resistor. The pin is pulled low by the POL converter,  
if the output voltage is outside of the window defined  
by the Power Good High and Low thresholds.  
8.3  
TEMP, Temperature Measurement  
Note: See the No-Bus Application Note for recommendations on  
The voltage output of the internal temperature  
sensor measuring junction temperature of the  
PG deglitching.  
controller IC.  
corresponds to the temperature range from -50°C to  
150°C.  
Voltage range from 0 to 2V  
8.12 TRIM, Output Voltage Trim  
The input of the TRIM comparator for the output  
voltage programming.  
8.4  
ENP, Enable Polarity  
The output voltage can be programmed by a single  
resistor connected between VREF and TRIM pins.  
Resistance of the trim resistor can be determined  
from the equation below:  
The input with the internal pull-up resistor. When the  
ENP pin is pulled low, the control logic of the EN  
input is inverted.  
8.5  
DELAY, Power-Up Delay  
20×(5.5 −VOUT  
)
The input of the POR circuit with the internal pull-up  
resistor. By connecting a capacitor between the pin  
and PGND the power-up delay can be programmed.  
RTRIM  
=
, kOhms  
VOUT  
where VOUT is the desired output voltage in Volts.  
8.6  
CCA[0:2], Compensation Coefficient  
Address  
If the RTRIM is open or the TRIM pin is shorted to  
PGND, the VOUT=0.5V.  
Inputs with internal pull-ups to select one of 7 sets of  
digital filter coefficients optimized for various  
application conditions.  
8.13 CS, Current Share/Sense Bus  
The open drain digital input/output with the internal  
pull-up resistor. The duty cycle of the digital signal is  
proportional to the output current of the POL  
converter. External capacitive loading of the pin  
shall be avoided.  
8.7  
VREF, Voltage Reference  
The output of the 2V internal voltage reference that  
is used to program the output voltage of the POL  
converter.  
8.8  
EN, Enable  
8.14 INTL[2:4], Interleave Bits  
The input with the internal pull-up resistor. The POL  
converter is turned off, when the pin is pulled low  
(see ENP to inverse logic of the Enable function).  
Inputs with internal pull-up resistors. The encoded  
number determines the phase lag of the POL  
converter when the IM pin is left floating. The phase  
lag is equal to the number multiplied by 45°.  
8.9  
OK, Fault Status  
The open drain input/output with the internal pull-up  
resistor. The POL converter pulls its OK pin low, if a  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 14 of 18  
 
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
8.15 +VS  
During normal operation the resistors are removed  
from the circuit by the switches. The “Margining  
Down” switch is normally closed shorting the resistor  
RDOWN while the “Margining Up” switch is normally  
open disconnecting the resistor RUP.  
The positive voltage input of the POL converter  
feedback loop.  
9. Application Information  
9.1  
Output Voltage Margining  
An alternative configuration of the margining circuit is  
shown in Figure 20. In this configuration both  
switches are normally open that may be  
advantageous in some implementations.  
Margining can be implemented either by changing  
the trim voltage as described in the previous  
paragraph or by changing the resistance between  
the REF and TRIM pins.  
POL  
Margining  
REF  
Margining  
Down Switch  
POL  
Up Switch  
(normally  
(normally  
closed)  
open)  
RTRIM  
REF  
Margining  
RUP  
Up Switch  
(normally  
open)  
RDOWN  
TRIM  
RUP  
RTRIM  
RDOWN  
Margining  
Down Switch  
(normally  
open)  
TRIM  
PGND  
PGND  
Figure 20. Alternative Margining Configuration  
Figure 19. Margining Configuration  
RUP and RDOWN for this configuration are determined  
from the following equations:  
In the schematic shown in Figure 19, the nominal  
output voltage is set with the trim resistor RTRIM  
calculated from the equation in the paragraph 8.12.  
Resistors RUP and RDOWN are added to margin the  
output voltage up and down respectively and  
determined from the equations below.  
20× RTRIM  
20 + RTRIM  
5× RTRIM − ∆V%  
∆V%  
RUP  
=
×   
, kΩ  
20× RTRIM  
20 + RTRIM  
100 − ∆V%  
∆V%  
RDOWN  
=
×
, kΩ  
20× RTRIM  
20 + RTRIM  
5× RTRIM − ∆V%  
∆V%  
RUP  
=
×   
, kΩ  
Caution: Noise injected into the TRIM node may affect accuracy  
of the output voltage and stability of the POL  
converter. Always minimize the PCB trace length from  
the TRIM pin to external components to avoid noise  
pickup.  
∆V%  
100 − ∆V%  
RDOWN  
=
(
20 + RTRIM  
)
×
, kΩ  
Refer to No-BusTM POL Converters. Z-1000 Series  
Application Note on www.power-one.com for more  
application information on this and other product  
features.  
where RTRIM is the value of the trim resistor in kΩ and  
ΔV% is the absolute value of desired margining  
expressed in percents of the nominal output voltage.  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 15 of 18  
 
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
10. Mechanical Drawings  
All Dimensions are in mm  
Tolerances:  
0.5-10 ±0.1  
10-100 ±0.2  
Pin Coplanarity: 0.1 max  
±0.30  
12.5  
SMT PICKUP POINT  
18  
19  
0.4  
±0.30  
22.2  
17.7  
1
36  
Pin 1  
2.6  
5.2  
Figure 21. Top (Left) and Bottom Views  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 16 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
6.5  
±0.30  
2.1  
8.7  
12  
Figure 22. Side View  
12.80 (Ao)  
Y
12.8  
SMT PICKUP  
POINT  
X
X
Pin 1 indicating  
Chamfer.  
Y
Section  
Y , Y  
DIRECTION OF FEED  
4
1.5  
24  
Section  
X , X  
Figure 23. Tape and Reel  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 17 of 18  
ZY1207 7A No-Bus POL Data Sheet  
3V to 14V Input • 0.5V to 5.5V Output  
22.20  
2.00  
19  
36  
0.60  
(x 36)  
10.40  
12.50  
Top View  
1
18  
Pin 1  
1.00  
2.60  
Figure 24. Recommended PCB Pad Sizes  
Figure 25. Recommended PCB Layout for Multilayer PCBs  
Notes:  
1. NUCLEAR AND MEDICAL APPLICATIONS - Power-One products are not designed, intended for use in, or authorized for use as critical  
components in life support systems, equipment used in hazardous environments, or nuclear control systems without the express written  
consent of the respective divisional president of Power-One, Inc.  
2. TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on  
the date manufactured. Specifications are subject to change without notice.  
ZD-00697 Rev. 2.1, 11-Oct-2011  
www.power-one.com  
Page 18 of 18  
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