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OV7930

型号:

OV7930

描述:

COLOR | NTSC | 510 X 492 |模拟|的CameraChip\n[ COLOR | NTSC | 510 x 492 | ANALOG | CameraChip ]

品牌:

ETC[ ETC ]

页数:

18 页

PDF大小:

552 K

Advanced Information  
Preliminary Datasheet  
mni isionTM  
O
TM  
OV7930 Color CMOS Analog CAMERACHIP  
General Description  
Applications  
Video Conferencing  
Video Phones  
Video E-mail  
The OV7930 (color) is a high performance quarter-inch  
TM  
CMOS CAMERACHIP  
designed for all applications  
requiring a small footprint, low voltage, low power  
consumption and low cost color video camera.  
PC Multimedia  
Toys  
Security  
Surveillance  
Finger Printing  
Medical and Dental Equipment  
The device supports NTSC composite video output and  
can directly interface with a VCR TV monitor or other  
75 ohm terminated input with 2X standard TV signal  
range. The OV7930 CAMERACHIPs require only a single  
5-volt DC power supply and have been designed for very  
low power operation.  
Key Specifications  
Features  
Array Size 510 x 492  
Single chip 1/4" lens video camera  
Power Supply 5 VDC + 5%  
Without Loading 20 mA  
Composite video: NTSC  
Power  
Sensitivity boost (+27 dB)/AGC ON/OFF  
Automatic exposure/gain/white balance  
External frame sync capability  
Aperture correction  
With 75 ohm  
Requirements  
< 35 mA  
Loading  
Image Area 4.00 mm x 3.08 mm  
Auto Electronic Exposure Time 1/60s - 6.3µs  
Minimum Illumination (3000K) < 2.0 Lux  
S/N Ratio > 46 dB  
SCCB programmable controls:  
Color saturation  
Brightness  
Hue  
White balance  
Exposure  
Dynamic Range > 70 dB  
Pixel Size 7.86 µm x 6.25 µm  
Dark Current < 100 mV/s  
Fixed Pattern Noise < 0.03% V  
PEAK-TO-PEAK  
Package Dimensions 0.45 in. x 0.45 in.  
Figure 1 OV7930 Pin Diagram  
Gain  
Gamma curve  
Aperture correction  
Gamma correction (0.45) ON/OFF  
Low power consumption  
+5 volt only power supply  
4
3
2
1
28  
27  
26  
NC  
VREQ  
VRCHG  
NC  
5
6
25  
24  
23  
22  
21  
20  
19  
FASTB  
PWDN  
Wide dynamic range, anti-blooming, zero smearing  
7
FODD/HGAIN  
VHS/MIR  
GAMMA  
FSI  
Ordering Information  
8
OV7930  
Product  
Packages  
NC  
9
OV7930 (Color, VGA,  
NTSC, CVO)  
CLCC-28, PLCC-28  
CVO  
10  
11  
OVDD  
DGND  
12  
13  
14  
15  
16  
17  
18  
Version 1.1, January 15, 2003  
Proprietary to OmniVision Technologies  
1
OV7930  
Color CMOS Analog CAMERACHIP™  
mni ision  
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Functional Description  
This section describes the various functions of the OV7930. Refer to Figure 2 for the functional block diagram of the OV7930.  
Figure 2 Functional Block Diagram  
NTSC  
Video  
Encoder  
Analog Signal  
Processor  
(ASP)  
Channel  
Control  
AMP  
CVO  
Column Sample/Hold  
Gain  
Control  
Balance  
Control  
ASP  
Control  
Image Array  
(528 X 500)  
Row  
Select  
Control  
Register  
Bank  
SCCB Slave  
Interface  
Clock/Timing Generator and Control Logic  
Video Standards  
Image Sensor Functions  
White Balance  
NTSC TV standards are implemented and available as  
output in the OV7930 CAMERACHIP. Note that the  
accuracy and stability of the crystal clock frequency is  
important to avoid unwanted color shift in the TV video  
system. A 14.31818 MHz crystal is recommended when  
using the OV7930 CAMERACHIP.  
The function of white balance in the OV7930 CAMERACHIP  
is to adjust and calibrate the image device sensitivity on  
the primary (RGB) colors to match the color cast of the  
light source. The Auto White Balance (AWB) can be  
enabled or disabled by SCCB register bit COMD[1] (see  
“COMD” on page 12).  
Video Format  
The OV7930 CAMERACHIP supports Composite (CVBS)  
video format only. Composite signals are generated from  
the built-in NTSC TV encoder.  
Mirror and Vertical Flip  
The OV7930 has pin control functions:  
Mirror (pin22 - see “VHS/MIR” on page 4)  
VFLIP (pin 15 input - see “VPXO/VFLP” on page 4)  
2
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
Functional Description  
mni ision  
O
These two functions can be controlled separately using  
SCCB register bit COME[6] (see “COME” on page 12) for  
the mirror function and register bit COMJ[0] (see “COMJ”  
on page 13) for the vertical flip function.  
Additional Picture Controls  
The OV7930 CAMERACHIP provides additional picture  
control functions to enhance image quality and chip  
performance.  
Multi-Chip Synchronize  
Automatic Gain Control (AGC)  
The OV7930 CAMERACHIP provides the multi-chip  
Synchronize function where one chip works as the master  
and all others as slave devices. The master chip provides  
the frame synchronize signal through the FODD pin (pin  
23 - see “FODD/HGAIN” on page 5). All slave devices  
accept the frame synchronize signal through the FSI pin  
(pin 20 - see “FSI” on page 4). This mode allows all  
devices to synchronize together.  
The default gain range is 1x - 8x while the user can set the  
gain range up to 4x or 16x.  
Brightness Control  
Brightness can be controlled either by internal automatic  
algorithms or by the user through the following SCCB  
register bits:  
Chip Configuration  
BRT[7:0] (see “BRT” on page 11)  
The OV7930 CAMERACHIP has been designed for  
ease-of-use in many stand-alone applications. Most of the  
on-chip functions are configurable by connecting the  
appropriate pins high (logic "1") or low (logic "0") through  
a 10 Kresistor. The CAMERACHIP reads the input pins at  
power up which enable user-defined default  
configurations.  
Gamma Correction  
The OV7930 has luminance and chrominance Gamma  
correction through the GAMMA pin (pin 21 - see  
“GAMMA” on page 4).  
The OV7930 CAMERACHIP also has a SCCB slave  
interface for programmable access to all registers  
functions. Refer to OmniVision Technologies Serial  
Camera Control Bus (SCCB) Specification for detailed  
usage of the serial control port.  
Backlight Control  
The OV7930 manages backlight conditions through  
register bit COME[4] (see “COME” on page 12).  
NOTE Once the SCCB interface is enabled (pin 14 -  
see “SCCB_E” on page 4), the following pin  
assignment functions will be ignored and  
functions will be defined by the related SCCB  
register. These pins are:  
Color Saturation  
Color saturation can be updated manually through the  
SCCB register bits SAT[7:4] (see “SAT” on page 11).  
ABRT (pin 3)  
BKLT (pin 4)  
VFLIP (pin 15)  
GAMMA (pin 21)  
MIR (pin 22)  
HGAIN (pin 23)  
FASTB (pin 25)  
Hue Adjustment  
Image hue can be adjusted through the SCCB register bits  
HUE[5:0] (see “HUE” on page 11).  
Version 1.1, January 15, 2003  
Proprietary to OmniVision Technologies  
3
OV7930  
Color CMOS Analog CAMERACHIP™  
mni ision  
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Pin Description  
Table 1  
Pin Description  
Name  
AGND  
Pin Number  
Pin Type Default (V)  
Function/Description  
01  
02  
03  
Power  
Power  
Input  
0
5
0
Analog ground  
AVDD  
ABRT  
Analog Power (+5 VDC)  
Auto brightness control ON/OFF  
Backlight selection  
04  
BKLT  
Input  
0
0:  
1:  
OFF  
ON  
05  
06  
07  
08  
09  
10  
11  
12  
13  
14  
NC  
2.5  
3.6  
5
No connection  
Internal reference  
Internal reference  
No connection  
No connection  
VREQ  
VRCHG  
NC  
Analog  
Analog  
NC  
CVO  
Output  
Power  
Power  
Power  
Input  
Composite video output, 2X standard NTSC TV signal  
Analog power for video output (+5 VDC)  
Analog power (+5 VDC)  
OVDD  
EVDD  
EGND  
SCCB_E  
5
0
Analog ground  
5
SCCB interface enable signal, active low  
Valid pixels detect output. CLK is asserted on this pin during  
the active image period. Power up initial pin value will be  
latched as vertical flip ON/OFF control.  
15  
VPXO/VFLP  
I/O  
0
0:  
1:  
OFF  
ON  
16  
17  
18  
19  
20  
XCLK1  
XCLK2  
DVDD  
DGND  
FSI  
Input  
Output  
Power  
Power  
Input  
5
Crystal clock input. 14.31818 MHz for NTSC  
Crystal clock output  
Digital power (+5 VDC)  
0
Digital ground  
0
Frame synchronizing signal input  
Gamma function ON/OFF  
21  
22  
GAMMA  
Input  
I/O  
5
0
0:  
1:  
OFF  
ON  
Vertical/Horizontal SYNC output. Power up initial pin value  
will be latched as mirror function ON/OFF control.  
VHS/MIR  
0:  
1:  
OFF  
ON  
4
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
Pin Description  
mni ision  
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Table 1  
Pin Description  
Name  
Pin Number  
Pin Type Default (V)  
Function/Description  
Even/odd field flag and frame synchronize signal output.  
Power up initial pin value will be latched as AGC gain range  
control.  
23  
FODD/HGAIN  
I/O  
0
0:  
1:  
AGC gain 1x - 4x  
AGC gain 1x - 8x  
Power down mode selection  
24  
25  
PWDN  
FASTB  
Input  
Input  
0
0
0:  
1:  
OFF  
ON  
AEC/AGC mode selection  
0:  
1:  
Fast mode  
Normal mode  
26  
27  
SIO_C  
SIO_D  
Input  
I/O  
SCCB serial interface clock  
SCCB serial interface data I/O  
After power up, first high pulse edge will trigger one shot  
AWB. System performs fast AWB only when this pin is high  
at this mode.  
28  
AWB1S  
Input  
0
Version 1.1, January 15, 2003  
Proprietary to OmniVision Technologies  
5
OV7930  
Color CMOS Analog CAMERACHIP™  
mni ision  
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Electrical Characteristics  
Table 2  
Operating Conditions  
Parameter  
Min  
0
Max  
40  
Unit  
°C  
Operating temperature  
Storage temperature  
Operating humidity  
Storage humidity  
-40  
TBD  
TBD  
125  
TBD  
TBD  
°C  
Table 3  
Symbol  
DC Electrical Characteristics (0°C < T < 85°C)  
A
Parameter  
Min  
Typ  
Max  
Unit  
Supply  
VDD  
Supply voltage (AVDD, DVDD, OVDD, EVDD)  
Supply current in VDDs (without loading)  
4.75  
5
5.25  
V
IDD  
20  
mA  
Digital Inputs  
VIL  
VIH  
CIN  
Input voltage LOW  
Input voltage HIGH  
Input capacitor  
1.0  
10  
V
V
3.5  
4
pF  
Digital Outputs  
VOH  
VOL  
Output voltage HIGH  
Output voltage LOW  
V
V
0.6  
SCCB (SIO_C and SIO_D)  
VIL  
VIH  
SIO_C and SIO_D  
-0.5  
3.5  
0
5
1
V
V
SIO_C and SIO_D  
VDD + 0.5  
6
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
Electrical Characteristics  
mni ision  
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Table 4  
Symbol  
Clock Input/Crystal Oscillator  
fOSC Resonator frequency  
AC Characteristics (T = 25°C, V = 5V)  
A
DD  
Parameter  
Min  
Typ  
Max  
Unit  
14.31818  
MHz  
pF  
Load capacitor  
33  
1
Parallel resistance  
MΩ  
ns  
Rise/fall time for external clock input  
Duty cycle for external clock input  
5
40  
50  
60  
%
CVO Analog Video Output Parameters  
VTO_P  
VTO_B  
VSYNC  
Ro  
Video peak signal level  
Video black signal level  
Video sync pulse amplitude  
Video output load  
2.0  
0.58  
0.58  
75  
V
V
V
I/O Pin  
Isource  
Isink  
Output pin source current (Output = 1.5v)  
Output pin sink current (Output = 3v)  
8
8
10  
10  
12  
12  
mA  
mA  
Miscellaneous Timing  
tSYNC External FSI cycle time  
tPU  
2
100  
field  
µs  
Chip power up time  
Power up delay time  
Power up low-z delay  
tPD  
10  
µs  
tPZ  
1000  
µs  
Version 1.1, January 15, 2003  
Proprietary to OmniVision Technologies  
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OV7930  
Color CMOS Analog CAMERACHIP™  
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Timing Specifications  
The OV7930 timing is standard NTSC TV timing. Figure 3 shows the NTSC timing and signal range. The OV7930 outputs 2X  
standard TV signals.  
Figure 3 NTSC Timing and Signal Range  
Th =63.49us  
VTO_P = 200 IRE  
Thblk = 10.08 µs  
Thsync  
=
4.76 µs  
vset = 8 IRE  
vsync = 83 IRE  
3.58 MHz  
Color Burst  
9 cycle  
80 IRE p_p  
(A) HORIZONTAL TIMING FOR NTSC  
FIELD 1  
VHSYNC  
523  
524  
525  
1
2
3
4
5
6
7
8
9
10  
11  
12  
EQUALIZING  
EQUALIZING  
VERTICAL SYNC  
FIELD 2  
264  
261  
262  
263  
265  
266  
267  
268  
269  
270  
271  
272  
273  
274  
EQUALIZING  
EQUALIZING  
(B) VERTICAL TIMING FOR NTSC  
8
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
Timing Specifications  
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Figure 4 SCCB Timing Diagram  
tF  
tR  
tHIGH  
tLOW  
SIO_C  
tHD:STA  
tHD:DAT  
tSU:DAT  
tSU:STA  
tSU:STO  
SIO_D  
IN  
tBUF  
tAA  
tDH  
SIO_D  
OUT  
SCCB_E  
Table 5  
Symbol  
fSIO_C  
tLOW  
SCCB Timing Specifications  
Parameter  
Min  
Typ  
Max  
Unit  
Clock Frequency  
400  
KHz  
Clock Low Period  
1.3  
600  
100  
1.3  
600  
600  
0
µs  
ns  
ns  
µs  
ns  
ns  
µs  
ns  
ns  
ns  
ns  
Clock High Period  
tHIGH  
SIO_C low to Data Out valid  
Bus free time before new START  
START condition Hold time  
START condition Setup time  
Data-in Hold time  
900  
tAA  
tBUF  
tHD:STA  
tSU:STA  
tHD:DAT  
tSU:DAT  
tSU:STO  
Data-in Setup time  
100  
600  
STOP condition Setup time  
SCCB Rise/Fall times  
Data-out Hold time  
300  
tR, tF  
50  
tDH  
Version 1.1, January 15, 2003  
Proprietary to OmniVision Technologies  
9
OV7930  
Color CMOS Analog CAMERACHIP™  
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OV7930 Light Response  
Figure 5 OV7930 Light Response  
10  
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
Register Set  
mni ision  
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Register Set  
Table 6 provides a list and description of the Device Control registers contained in the OV7930. The device slave addresses  
are 80 for write and 81 for read.  
Table 6  
Device Control Register List  
Address  
(Hex)  
Register  
Name  
Default  
(Hex)  
R/W  
Description  
00  
GAIN  
00  
RW  
AGC Gain Control  
Blue Channel Gain Control MSB, 8 bits  
01  
BLUE  
80  
RW  
RW  
(LSB 2 bits in register BRLOW[1:0] (see “BRLOW” on page 11).  
Red Channel Gain Control MSB, 8 bits  
(LSB 2 bits in register BRLOW[5:4] (see “BRLOW” on page 11).  
02  
03  
RED  
SAT  
80  
80  
Saturation Control  
Bit[7:4]: Saturation adjustment  
0000: Lowest  
RW  
RW  
1111: Highest  
Bit[3:0]: Reserved  
Hue Adjustment Control  
Bit[7:6]: Reserved  
Bit[5]:  
Hue control ON/OFF  
0: OFF  
04  
HUE  
10  
1: ON  
Bit[4:0]: Hue control setting  
Range: -20° to +20° (10000 in the middle)  
05  
06  
RSVD  
BRT  
XX  
80  
Reserved  
Brightness Adjustment Control  
• Range: [00] to [FF]  
RW  
Note: If auto brightness is enabled, this register will be automatically  
updated by internal control. If auto brightness is disabled, the user can  
update brightness value.  
Sharpness Adjustment  
07  
SHP  
D4  
XX  
RW  
Bit[7:4]: Sharpness ON/OFF threshold  
Bit[3:0]: Sharpness adjustment  
08-09  
RSVD  
Reserved  
Blue/Red Channel Gain LSBs  
Bit[7:6]: Reserved  
0A  
BRLOW  
RSVD  
00  
RW  
Bit[5:4]: Red channel AWB gain two lower bits  
Bit[3:2]: Reserved  
Bit[1:0]: Blue channel AWB gain two lower bits  
0B-0D  
XX  
Reserved  
Common Control B  
Bit[7]:  
Edge enhancement ON/OFF  
0: OFF  
0E  
COMB  
96  
RW  
1: ON  
Bit[6:0]: Reserved  
Version 1.1, January 15, 2003  
Proprietary to OmniVision Technologies  
11  
OV7930  
Color CMOS Analog CAMERACHIP™  
mni ision  
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Table 6  
Device Control Register List  
Address  
(Hex)  
Register  
Name  
Default  
(Hex)  
R/W  
Description  
0F  
10  
11  
12  
RSVD  
VER  
XX  
01  
7F  
A2  
Reserved  
R
Version number  
MIDH  
MIDL  
R
Manufacturer ID Byte -- High (Read only = 0x7F)  
Manufacturer ID Byte – Low (Read only = 0xA2)  
Exposure Control Value  
R
13  
AEC  
82  
RW  
• Range: [00] to [82]  
Tex = (2 x AEC[7:0] + 1) x 63.5 µs  
Common Control D  
Bit[7:6]: AEC/AGC algorithm analyze image area selection  
00: Whole image  
01: Lower two-thirds image  
10: Lower one-half image  
11: Lower one-third image  
Bit[5:3]: Reserved  
Bit[2]:  
Bit[1]:  
Bit[0]:  
AGC ON/OFF  
0: OFF  
14  
COMD  
1F  
RW  
1: ON  
AWB ON/OFF  
0: OFF  
1: ON  
AEC ON/OFF  
0: OFF  
1: ON  
Common Control E  
Bit[7]:  
SRST  
1: Initiates soft reset. All registers are set to default  
values after which the chip resumes normal  
operation.  
Bit[6]:  
Mirror image selection  
0: Normal  
1: Output mirror image  
Bit[5]:  
Bit[4]:  
Vertical sync option (see “COMG” on page 13 for details)  
Backlight exposure mode ON/OFF  
0: OFF  
15  
COME  
04  
RW  
1: ON  
Bit[3]:  
Bit[2]:  
Reserved  
AGC gain ceiling selection - combined with COMJ[3] (see  
“COMJ” on page 13) as follows:  
0: 1x to 4x  
1: 1x to 8x/16x  
Bit[1:0]: Reserved  
Common Control F  
Bit[7:3]: Reserved  
Bit[2]:  
Banding filter ON/OFF  
0: OFF  
1: ON  
16  
COMF  
44  
RW  
Bit[1:0]: Reserved  
12  
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
Register Set  
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Table 6  
Device Control Register List  
Address  
(Hex)  
Register  
Name  
Default  
(Hex)  
R/W  
Description  
Common Control G  
Bit[7]:  
Fast AGC/AEC algorithm ON/OFF  
0: OFF  
1: ON  
Bit[6:5]: Reserved  
Bit[4]:  
FODD pin (pin 23 - see “FODD/HGAIN” on page 5) output  
signal selection - combined with COME[5] (see “COME”  
on page 12) as follows:  
17  
COMG  
95  
RW  
COMG[4]  
COME[5]  
FODD (pin 23)  
0
0
1
0
1
X
VSYNC every field  
VSYNC every two fields  
FODD (odd field flagged)  
Bit[3:0]: Reserved  
AEC/AGC Luminance Level Control  
Bit[7:4]: Low level luminance percentage  
Bit[3:0]: High level luminance percentage  
18  
AECPT  
A5  
RW  
Note: Stable condition is AECPT[7:4] + AECPT[3:0] > 0x0E.  
AEC/AGC Luminance Level Control in Backlight Mode  
Bit[7:4]: Low level luminance percentage in backlight mode  
Bit[3:0]: High level luminance percentage in backlight mode  
19  
BKPT  
RSVD  
59  
RW  
Note: Stable condition is BKPT[7:4] + BKPTT[3:0] > 0x0E.  
1A-1C  
XX  
Reserved  
Common Control J  
Bit[7]:  
Pixel clock polarity selection  
0: Normal  
1: Revised pixel clock output  
Bit[6:4]: Reserved  
Bit[3]:  
AGC gain ceiling - in effect only if COME[2] = "1" (see  
“COME” on page 12)  
0: 8X  
1D  
COMJ  
30  
RW  
1: 16X  
Reserved  
Bit[2]:  
Bit[1]:  
NTSC with 50 Hz light compensation. In effect only when  
COMD[0] = "1" (see “COMD” on page 12) and  
COMF[2] = "1" (see “COMF” on page 12)  
Vertical flip selection  
0: Normal  
1: Vertical flip output image  
Bit[0]:  
1E-20  
21  
RSVD  
VPT  
XX  
A4  
XX  
RW  
Reserved  
AEC/AGC Fast mode threshold  
Bit[7:4]: Fast AEC/AGC low level percentage threshold  
Bit[3:0]: Fast AEC/AGC high level percentage threshold  
22-33  
RSVD  
Reserved  
NOTE: All other registers are factory-reserved. Please contact OmniVision Technologies for reference register settings.  
Version 1.1, January 15, 2003 Proprietary to OmniVision Technologies 13  
OV7930  
Color CMOS Analog CAMERACHIP™  
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Package Specifications  
The OV7930 uses either a 28-pin ceramic package or 28-pin plastic package. Refer to Figure 6 for ceramic package  
information, Figure 7 for plastic package information, and Figure 8 for the array center on the chip.  
Figure 6 OV7930 Ceramic Package Specifications  
.083 ± .01  
.450 SQ ± .008  
.350 SQ ± .006  
.060 ± .006  
.020 ± .002  
.020 ± .002  
.300 ± .005  
.075  
± .010  
.013 MIN  
B/F EXPOSURE  
.011 MIN  
.050  
.020 ± .002  
± .004  
5
11  
11  
5
.012 R TYP.  
.050 TYP  
12  
8
7
4
4
.022 ± .004  
12  
9
6
.001 to .005 TYP  
.014 TYP  
.010 x 45o CHAMFER  
PIN 1 INDEX  
PIN NO. 1  
INDEX  
.409  
± .004  
.020 TYP  
1
1
1
.300 SQ  
± .005  
28  
28  
28  
.025 ± .003  
20  
.008 R REF  
TYP  
18  
23  
26  
26  
20  
21  
22  
19  
25  
25  
19  
.012 R TYP.  
.007 MAX  
B/F PULL BACK  
.035  
MIN.  
.040  
TYP  
.110 REF  
TYP  
.009 R REF  
TYP  
.015 MIN  
TYP  
.085 TYP  
.200 ± .005  
MP-2  
MP-3  
.040 REF  
(METALLIZED)  
CERAMIC  
MP-4  
KYOCERA A440  
(BLACK)  
Table 7  
OV7930 Ceramic Package Dimensions  
Dimensions  
Millimeters (mm)  
11.43 + 0.20 SQ  
2.11 + 0.25  
Inches (in.)  
.450 + .008 SQ  
.083 + .01  
Package Size  
Package Height  
Substrate Height  
Cavity Size  
0.51 + 0.05  
.020 + .002  
.300 + .005 SQ  
.040 + .004  
.025 x .085  
7.62 + 0.13 SQ  
1.02 + 0.1  
Castellation Height  
Pin #1 Pad Size  
0.64 x 2.16  
Pad Size  
0.64 x 1.27  
.025 x .050  
Pad Pitch  
1.27 + 0.10  
.050 + .004  
.075 + .010  
.300 + .005  
.409 + .004 SQ  
.022 + .002  
Package Edge to First Lead Center  
End-to-End Pad Center-Center  
Glass Size  
1.91 + 0.25  
7.62 + 0.13  
10.41 + 0.10 SQ  
0.55 + 0.05  
Glass Height  
14  
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
Package Specifications  
mni ision  
O
Figure 7 OV7930 Plastic Package Specifications  
.093 ± .004  
.450 SQ ± .004  
.042 ± .002  
.028 ± .002  
.300 ± .004  
.075 ± .004  
.050 TYP  
.350 SQ ± .006  
.275 SQ ± .004  
.050 ± .004  
5
11  
8
7
5
11  
12  
4
.012 x 45o  
12  
4
.022 ± .002  
9
6
.001 to .005 TYP  
Pin 1  
Index  
.010 x 45o Chamfer  
Pin 1 Index  
.406  
± .004  
1
1
1
28  
28  
28  
20  
23  
18  
26  
18  
26  
19  
25  
21  
19  
22  
25  
.009 R REF  
TYP  
.035  
MIN.  
.025 ± .003  
TYP  
.085  
TYP  
.028 ± .002  
(Metallized)  
Table 8  
OV7930 Plastic Package Dimensions  
Dimensions  
Millimeters (mm)  
11.43 + 0.10 SQ  
2.35 + 0.1  
Inches (in.)  
Package Size  
.450 + .004 SQ  
.093 + .004  
.028 + .002  
.275 + .004 SQ  
.042 + .002  
.025 x .085  
Package Height  
Substrate Height  
Cavity Size  
0.70 + 0.05  
7.00 + 0.10 SQ  
1.07 + 0.05  
Castellation Height  
Pin #1 Pad Size  
Pad Size  
0.64 x 2.16  
0.64 x 1.27  
.025 x .050  
Pad Pitch  
1.27 + 0.10  
.050 + .004  
.075 + .004  
.300 + .004  
.406 + .004 SQ  
.022 + .002  
Package Edge to First Lead Center  
End-to-End Pad Center-Center  
Glass Size  
1.90 + 0.10  
7.62 + 0.10  
10.30 + 0.10 SQ  
0.55 + 0.05  
Glass Height  
Version 1.1, January 15, 2003  
Proprietary to OmniVision Technologies  
15  
OV7930  
Color CMOS Analog CAMERACHIP™  
mni ision  
O
Sensor Array Center  
Figure 8 OV7930 Sensor Array Center  
1
Scan Origin  
Die  
Sensor  
Array  
Package Center  
(0,0)  
Positional Tolerance s  
Die shift (x,y) = 0.15 mm (6 mils) max.  
Die tilt = 1 degrees max.  
Die rotation = 3 degrees max.  
Array Center  
(276µm, -89µm)  
NOTES: 1. This drawing is not to scale and is for reference only.  
2. As most optical assemblies invert and mirror the image, the chip is typically mounted  
with pin one oriented down on the PCB.  
16  
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
Package Specifications  
mni ision  
O
Note:  
• All information shown herein is current as of the revision and publication date. Please refer  
to the OmniVision web site (http://www.ovt.com) to obtain the current versions of all  
documentation.  
• OmniVision Technologies, Inc. reserves the right to make changes to their products or to  
discontinue any product or service without further notice (It is advisable to obtain current product  
documentation prior to placing orders).  
• Reproduction of information in OmniVision product documentation and specifications is  
permissible only if reproduction is without alteration and is accompanied by all associated  
warranties, conditions, limitations and notices. In such cases, OmniVision is not responsible  
or liable for any information reproduced.  
• This document is provided with no warranties whatsoever, including any warranty of  
merchantability, non-infringement, fitness for any particular purpose, or any warranty  
otherwise arising out of any proposal, specification or sample. Furthermore, OmniVision  
Technologies Inc. disclaims all liability, including liability for infringement of any proprietary  
rights, relating to use of information in this document. No license, expressed or implied, by  
estoppels or otherwise, to any intellectual property rights is granted herein.  
• ‘OmniVision’, ‘CameraChip’ are trademarks of OmniVision Technologies, Inc. All other trade,  
product or service names referenced in this release may be trademarks or registered trademarks of  
their respective holders. Third-party brands, names, and trademarks are the property of their  
respective owners.  
For further information, please feel free to contact OmniVision at info@ovt.com.  
OmniVision Technologies, Inc.  
Sunnyvale, CA USA  
(408) 733-3030  
Version 1.1, January 15, 2003  
Proprietary to OmniVision Technologies  
17  
OV7930  
Color CMOS Analog CAMERACHIP™  
mni ision  
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18  
Proprietary to OmniVision Technologies  
Version 1.1, January 15, 2003  
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