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2V7002K

型号：

2V7002K

描述：

小信号MOSFET 60 V 380毫安，单，NA ????通道， SOTA ???? 23[ Small Signal MOSFET 60 V, 380 mA, Single, N−Channel, SOT−23 ]

品牌：

ONSEMI[ ONSEMI ]

页数：

6 页

PDF大小：

103 K

下载PDF手册
2N7002K, 2V7002K  
Small Signal MOSFET  
60 V, 380 mA, Single, N−Channel, SOT−23  
Features  
• ESD Protected  
• Low R  
DS(on)  
http://onsemi.com  
• Surface Mount Package  
• 2V Prefix for Automotive and Other Applications Requiring Unique  
Site and Control Change Requirements; AEC−Q101 Qualified and  
PPAP Capable  
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
Compliant  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(on)  
1.6 W @ 10 V  
2.5 W @ 4.5 V  
60 V  
380 mA  
SIMPLIFIED SCHEMATIC  
Applications  
• Low Side Load Switch  
• Level Shift Circuits  
Gate  
1
• DC−DC Converter  
3
Drain  
• Portable Applications i.e. DSC, PDA, Cell Phone, etc.  
MAXIMUM RATINGS (T = 25°C unless otherwise stated)  
J
Source  
2
Rating  
Drain−to−Source Voltage  
Gate−to−Source Voltage  
Symbol  
Value  
60  
Unit  
V
V
DSS  
(Top View)  
V
GS  
20  
V
MARKING DIAGRAM  
& PIN ASSIGNMENT  
Drain  
Drain Current (Note 1)  
Steady State 1 sq in Pad  
I
D
mA  
T = 25°C  
A
380  
270  
3
A
T = 85°C  
3
Drain Current (Note 2)  
I
mA  
D
1
Steady State Minimum Pad  
T = 25°C  
A
320  
230  
A
2
T = 85°C  
704 MG  
SOT−23  
CASE 318  
STYLE 21  
Power Dissipation  
Steady State 1 sq in Pad  
Steady State Minimum Pad  
P
mW  
G
D
420  
300  
1
2
Gate  
Source  
Pulsed Drain Current (t = 10 ms)  
I
1.5  
A
p
DM  
704  
M
= Specific Device Code*  
= Date Code*  
= Pb−Free Package  
Operating Junction and Storage  
Temperature Range  
T , T  
−55 to  
+150  
°C  
J
STG  
G
(Note: Microdot may be in either location)  
Source Current (Body Diode)  
I
S
300  
260  
mA  
*Specific Device Code, Date Code or overbar  
orientation and/or location may vary depend-  
ing upon manufacturing location. This is a  
representation only and actual devices may  
not match this drawing exactly.  
Lead Temperature for Soldering Purposes  
(1/8″ from case for 10 s)  
T
°C  
L
Gate−Source ESD Rating  
(HBM, Method 3015)  
ESD  
2000  
V
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Surface−mounted on FR4 board using 1 sq in pad size with 1 oz Cu.  
2. Surface−mounted on FR4 board using 0.08 sq in pad size with 1 oz Cu.  
ORDERING INFORMATION  
†
Device  
Package  
Shipping  
2N7002KT1G  
SOT−23  
3000 / Tape & Reel  
(Pb−Free)  
2V7002KT1G  
SOT−23  
3000 / Tape & Reel  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
©
Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
February, 2013 − Rev. 11  
2N7002K/D  
 
2N7002K, 2V7002K  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
300  
92  
Unit  
Junction−to−Ambient − Steady State (Note 3)  
Junction−to−Ambient − t ≤ 5 s (Note 3)  
Junction−to−Ambient − Steady State (Note 4)  
Junction−to−Ambient − t ≤ 5 s (Note 4)  
R
q
JA  
°C/W  
417  
154  
3. Surface−mounted on FR4 board using 1 sq in pad size with 1 oz Cu.  
4. Surface−mounted on FR4 board using 0.08 sq in pad size with 1 oz Cu.  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain−to−Source Breakdown Voltage  
V
V
GS  
= 0 V, I = 250 mA  
60  
V
(BR)DSS  
D
Drain−to−Source Breakdown Voltage  
Temperature Coefficient  
V
/T  
71  
mV/°C  
(BR)DSS  
J
Zero Gate Voltage Drain Current  
I
T = 25°C  
1
mA  
DSS  
J
V
V
= 0 V,  
= 60 V  
GS  
T = 125°C  
J
10  
DS  
V
GS  
= 0 V,  
T = 25°C  
J
100  
nA  
V
DS  
= 50 V  
Gate−to−Source Leakage Current  
I
V
= 0 V, V  
=
=
20 V  
10 V  
5.0 V  
10  
450  
150  
mA  
nA  
nA  
GSS  
DS  
DS  
DS  
GS  
GS  
GS  
V
= 0 V, V  
V
= 0 V, V  
=
ON CHARACTERISTICS (Note 5)  
Gate Threshold Voltage  
V
V
GS  
= V , I = 250 mA  
1.0  
2.3  
V
GS(TH)  
DS  
D
Negative Threshold Temperature  
Coefficient  
V
/T  
4.0  
mV/°C  
GS(TH)  
J
Drain−to−Source On Resistance  
R
V
= 10 V, I = 500 mA  
1.19  
1.33  
530  
1.6  
2.5  
W
DS(on)  
GS  
D
V
GS  
= 4.5 V, I = 200 mA  
D
Forward Transconductance  
g
FS  
V
= 5 V, I = 200 mA  
mS  
pF  
DS  
D
CHARGES AND CAPACITANCES  
Input Capacitance  
C
24.5  
4.2  
2.2  
0.7  
0.1  
0.3  
0.1  
ISS  
V
= 0 V, f = 1 MHz,  
GS  
Output Capacitance  
C
C
OSS  
RSS  
V
DS  
= 20 V  
Reverse Transfer Capacitance  
Total Gate Charge  
Q
nC  
ns  
V
G(TOT)  
Threshold Gate Charge  
Gate−to−Source Charge  
Gate−to−Drain Charge  
Q
G(TH)  
V
GS  
= 4.5 V, V = 10 V;  
DS  
I
D
= 200 mA  
Q
GS  
GD  
Q
SWITCHING CHARACTERISTICS, V = V (Note 6)  
GS  
Turn−On Delay Time  
Rise Time  
t
12.2  
9.0  
d(ON)  
t
r
V
I
= 10 V, V = 25 V,  
DD  
GS  
= 500 mA, R = 25 W  
Turn−Off Delay Time  
Fall Time  
t
55.8  
29  
D
G
d(OFF)  
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
T = 25°C  
J
0.8  
0.7  
1.2  
SD  
V
= 0 V,  
GS  
= 200 mA  
I
T = 85°C  
J
S
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%  
6. Switching characteristics are independent of operating junction temperatures  
http://onsemi.com  
2
 
2N7002K, 2V7002K  
TYPICAL CHARACTERISTICS  
1.6  
1.2  
0.8  
1.2  
5.0 V  
4.5 V  
V
= 10 V  
GS  
9.0 V  
4.0 V  
8.0 V  
7.0 V  
6.0 V  
0.8  
3.5 V  
T = 25°C  
J
3.0 V  
2.5 V  
0.4  
0
0.4  
0
T = 125°C  
T = −55°C  
J
J
0
2
4
6
0
2
4
6
V , DRAIN−TO−SOURCE VOLTAGE (V)  
DS  
V , GATE−TO−SOURCE VOLTAGE (V)  
GS  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
3.2  
2.8  
2.4  
2.0  
1.6  
1.2  
0.8  
3.2  
2.8  
2.4  
2.0  
1.6  
1.2  
0.8  
V
GS  
= 4.5 V  
V
GS  
= 10 V  
T = 125°C  
J
T = 125°C  
J
T = 85°C  
J
T = 85°C  
J
T = 25°C  
J
T = 25°C  
J
T = −55°C  
J
T = −55°C  
J
0.4  
0
0.4  
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
I , DRAIN CURRENT (A)  
D
I , DRAIN CURRENT (A)  
D
Figure 3. On−Resistance vs. Drain Current and  
Figure 4. On−Resistance vs. Drain Current and  
Temperature  
Temperature  
2.4  
2.0  
1.6  
1.2  
2.2  
1.8  
1.4  
I
D
= 0.2 A  
I
= 500 mA  
D
V
GS  
= 4.5 V  
V
= 10 V  
GS  
I
D
= 200 mA  
1.0  
0.6  
0.8  
0.4  
2
4
6
8
10  
−50 −25  
0
25  
50  
75  
100  
125 150  
V , GATE−TO−SOURCE VOLTAGE (V)  
GS  
T , JUNCTION TEMPERATURE (°C)  
J
Figure 5. On−Resistance vs. Gate−to−Source  
Figure 6. On−Resistance Variation with  
Voltage  
Temperature  
http://onsemi.com  
3
2N7002K, 2V7002K  
TYPICAL CHARACTERISTICS  
30  
5
C
iss  
T = 25°C  
J
I
D
= 0.2 A  
4
3
2
20  
10  
0
T = 25°C  
J
V
GS  
= 0 V  
C
oss  
1
0
C
rss  
0
4
8
12  
16  
20  
0
0.2  
0.4  
0.6  
0.8  
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)  
Qg, TOTAL GATE CHARGE (nC)  
Figure 7. Capacitance Variation  
Figure 8. Gate−to−Source and  
Drain−to−Source Voltage vs. Total Charge  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
10  
1
I
= 250 mA  
D
V
GS  
= 0 V  
T = 85°C  
J
T = 25°C  
J
0.1  
0.01  
0.4  
0.6  
0.8  
1.0  
1.2  
−50 −25  
0
25  
50  
75  
100  
125 150  
V , SOURCE−TO−DRAIN VOLTAGE (V)  
SD  
T , JUNCTION TEMPERATURE (°C)  
J
Figure 9. Diode Forward Voltage vs. Current  
Figure 10. Threshold Voltage with  
Temperature  
http://onsemi.com  
4
2N7002K, 2V7002K  
TYPICAL CHARACTERISTICS  
1000  
100  
10  
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
1
SINGLE PULSE  
0.1  
0.000001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t, PULSE TIME (s)  
Figure 11. Thermal Response − 1 sq in pad  
1000  
100  
10  
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
1
SINGLE PULSE  
0.1  
0.000001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t, PULSE TIME (s)  
Figure 12. Thermal Response − minimum pad  
http://onsemi.com  
5
2N7002K, 2V7002K  
PACKAGE DIMENSIONS  
SOT−23 (TO−236)  
CASE 318−08  
ISSUE AP  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
D
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH  
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM  
THICKNESS OF BASE MATERIAL.  
SEE VIEW C  
3
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,  
PROTRUSIONS, OR GATE BURRS.  
H
E
MILLIMETERS  
INCHES  
NOM  
0.040  
0.002  
0.018  
0.005  
0.114  
0.051  
0.075  
0.008  
0.021  
0.094  
−−−  
E
DIM  
A
A1  
b
c
D
E
e
L
L1  
MIN  
0.89  
0.01  
0.37  
0.09  
2.80  
1.20  
1.78  
0.10  
0.35  
2.10  
0°  
NOM  
1.00  
0.06  
0.44  
0.13  
2.90  
1.30  
1.90  
0.20  
0.54  
2.40  
−−−  
MAX  
MIN  
0.035  
0.001  
0.015  
0.003  
0.110  
0.047  
0.070  
0.004  
0.014  
0.083  
0°  
MAX  
0.044  
0.004  
0.020  
0.007  
0.120  
0.055  
0.081  
0.012  
0.029  
0.104  
10°  
1.11  
0.10  
0.50  
0.18  
3.04  
1.40  
2.04  
0.30  
0.69  
2.64  
10°  
c
1
2
b
0.25  
e
q
H
A
E
q
L
STYLE 21:  
A1  
L1  
VIEW C  
PIN 1. GATE  
2. SOURCE  
3. DRAIN  
SOLDERING FOOTPRINT  
0.95  
0.037  
0.95  
0.037  
2.0  
0.079  
0.9  
0.035  
mm  
inches  
ǒ
Ǔ
SCALE 10:1  
0.8  
0.031  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer  
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81−3−5817−1050  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
2N7002K/D  
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