请登录

免费注册
全部商品
电子元器件
方案中心
工业品
PDF资料
购物车 0
上传BOM

产品分类

找货询价

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

QQ咨询

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

会员中心
购物车
技术支持

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

售后咨询

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

IZ74LV574

型号：

IZ74LV574

描述：

八路D型触发器;正边沿触发（三态）[ Octal D-type flip-flop; positive edge-trigger (3-State) ]

品牌：

INTEGRAL[ INTEGRAL CORP. ]

页数：

8 页

PDF大小：

198 K

下载PDF手册
TECHNICAL DATA  
IN74LV574  
Octal D-type flip-flop;  
positive edge-trigger (3-State)  
N SUFFIX  
PLASTIC DIP  
The 74LV574 is a low-voltage Si-gate CMOS device and is pin and  
function compatible with 74HC/HCT574.  
The 74LV574 is an octal D-type flip–flop featuring separate D-type  
inputs for each flip-flop and non-inverting 3-state outputs for oriented  
applications. A clock (CP) and an output enable (OE) input are common  
to all flip-flops. The eight flip-flops will store the state of their individual  
D-inputs that meet the set-up and hold times requirements on the LOW-  
to-HIGH CP transition. When OE is LOW, the contents of the eight flip-  
flops are available at the outputs. When OE is HIGH, the outputs go to  
the high impedance OFF-state. Operation of the OE input does not affect  
the state of the flip-flops.  
20  
1
DW SUFFIX  
SO  
20  
1
ORDERING INFORMATION  
IN74LV574N  
IN74LV574DW  
IZ74LV574  
Plastic DIP  
SOIC  
chip  
·
Output voltage levels are compatible with input levels of CMOS,  
NMOS and TTL ICS  
TA = -40° to 125° C for all packages  
·
·
·
Supply voltage range: 1.0 to 5.5 V  
Low input current: 1.0 mÀ; 0.1 mÀ at Ò = 25 °Ñ  
High Noise Immunity Characteristic of CMOS Devices  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
FUNCTION TABLE  
Inputs  
Clock  
Output  
Q
Output  
Enable  
D
PIN 20=VCC  
PIN 10 = GND  
L
L
H
L
H
L
L
L,H,  
X
no  
change  
H
X
X
Z
H= high level  
L = low level  
X = don’t care  
Z = high impedance  
INTEGRAL  
1
IN74LV574  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
-0.5 to +7.0  
±20  
Unit  
V
VCC  
DC supply voltage  
Input diode current  
Output diode current  
1
IIK  
*
mA  
mA  
mA  
mA  
mA  
mW  
2
IOK  
*
±50  
IO *3  
Output source or sink current  
VCC current  
±35  
ICC  
±70  
IGND  
PD  
GND current  
±70  
Power dissipation per package:  
Plastic DIP *4  
750  
500  
SO *4  
Tstg  
TL  
Storage Temperature  
-65 to +150  
260  
°C  
°C  
Lead Temperature, 1.5 mm (Plastic DIP Package), 0.3 mm (SO  
Package) from Case for 4 Seconds  
*Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
1
*
*
*
V < -0.5 V or V > VCC + 0.5 V.  
I I  
VO < -0.5 V or VO > VCC + 0.5 V.  
-0.5 V < VO < VCC + 0.5 V.  
2
3
*4 Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C  
SO Package: : - 8 mW/°C from 70° to 125°C  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
1.0  
0
Max  
5.5  
Unit  
V
VCC  
DC Supply Voltage  
DC Input Voltage  
DC Output Voltage  
V
I
VCC  
V
VO  
TA  
0
VCC  
V
Operating Temperature, All Package Types  
Input Rise and Fall Time (Figure 1)  
-40  
+125  
°C  
ns  
0 V £ VCC £ 2.0 V  
2.0 V £ VCC £ 2.7 V  
2.7 V £ VCC £ 3.6 V  
tr, tf  
0
0
0
0
500  
200  
100  
50  
3.6 V £ VCC £ 5.5 V  
This device contains protection circuitry to guard against damage due to high static voltages or electric  
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages  
to this high-impedance circuit. For proper operation, V and VOUT should be constrained to the range GND£(V or  
IN  
IN  
VOUT)£VCC.  
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused  
outputs must be left open.  
INTEGRAL  
2
IN74LV574  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Test  
VCC  
V
Guaranteed Limit  
-40°C 85°C  
max min max  
Symbol Parameter  
conditions  
25°C  
min  
125°C  
Unit  
min  
max min max  
V
IH  
HIGH level  
input  
voltage  
1.2  
2.0  
2.7  
3.0  
3.6  
4.5  
5.5  
0.9  
1.4  
2.0  
2.0  
2.0  
-
-
-
-
-
-
-
0.9  
1.4  
2.0  
2.0  
2.0  
-
-
-
-
-
-
-
0.9  
1.4  
2.0  
2.0  
2.0  
-
-
-
-
-
-
-
0.9  
1.4  
2.0  
2.0  
2.0  
-
-
-
-
-
-
-
V
3.15  
3.85  
3.15  
3.85  
3.15  
3.85  
3.15  
3.85  
V
LOW level  
output  
voltage  
1.2  
2.0  
2.7  
3.0  
3.6  
4.5  
5.5  
-
-
-
-
-
-
-
0.3  
0.6  
0.8  
0.8  
0.8  
-
-
-
-
-
-
-
0.3  
0.6  
0.8  
0.8  
0.8  
-
-
-
-
-
-
-
0.3  
0.6  
0.8  
0.8  
0.8  
-
-
-
-
-
-
-
0.3  
0.6  
0.8  
0.8  
0.8  
V
V
IL  
1.35  
1.65  
1.35  
1.65  
1.35  
1.65  
1.35  
1.65  
VOH  
HIGH level V = V or V  
IL  
output  
voltage  
1.2  
2.0  
2.7  
3.0  
3.6  
4.5  
5.5  
1.05  
1.85  
2.55  
2.85  
3.45  
4.35  
5.35  
-
-
-
-
-
-
-
1.05  
1.85  
2.55  
2.85  
3.45  
4.35  
5.35  
-
-
-
-
-
-
-
1.0  
1.8  
2.5  
2.8  
3.4  
4.3  
5.3  
-
-
-
-
-
-
-
1.0  
1.8  
2.5  
2.8  
3.4  
4.3  
5.3  
-
-
-
-
-
-
-
I
IH  
IO = -100 mÀ  
V = V or V  
IL  
3.0  
2.48  
-
2.48  
-
2.40  
-
2.20  
-
V
V
V
I
IH  
IO = -8 mÀ  
V = V or V  
IL  
4.5  
3.70  
-
3.70  
-
3.60  
-
3.50  
-
I
IH  
IO = -16 mÀ  
LOW level V = V or V  
IL  
VOL  
1.2  
2.0  
2.7  
3.0  
3.6  
4.5  
5.5  
-
-
-
-
-
-
-
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
-
-
-
-
-
-
-
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
-
-
-
-
-
-
-
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
-
-
-
-
-
-
-
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
I
IH  
output  
voltage  
IO = 100 mÀ  
V = V or V  
IL  
3.0  
4.5  
5.5  
5.5  
-
-
-
-
-
0.33  
0.40  
±0.1  
8.0  
-
-
-
-
-
0.33  
0.40  
±0.1  
8.0  
-
-
-
-
-
0.40  
0.55  
±1.0  
20  
-
-
-
-
0.50  
V
V
I
IH  
IO = 8 mÀ  
V = V or V  
IL  
0.65  
I
IH  
IO = 16 mÀ  
II  
Input  
current  
V = VCC or 0 V  
I
±1.0 mÀ  
160 mÀ  
0.85 mA  
ICC  
ICC1  
Supply  
current  
V =VCC or 0 V  
I
IO = 0 mÀ  
Additional V = VCC – 0.6V 2.7  
0.2  
0.2  
0.5  
I
supply  
3.6  
current per  
input  
INTEGRAL  
3
IN74LV574  
IOZ  
Three state 3-state output  
5.5  
-
±0.5  
-
±0.5  
-
±5  
-
±10  
mÀ  
leakage  
current  
V (11) = V  
VO =VCC or 0 V  
I
IH  
AC ELECTRICAL CHARACTERISTICS (CL=50 pF, tr=tf=2.5 ns)  
Test  
VCC  
V
Guaranteed Limit  
Symbol  
Parameter  
conditions  
-40°C to  
25°C  
85°C  
125°C  
Unit  
min max  
min  
max min  
max  
tPHL, tPLH Propagation delay , Clock V = 0 V or V  
1.2  
2.0  
2.7  
3.0  
4.5  
-
-
-
-
-
160  
26  
20  
16  
14  
-
-
-
-
-
170  
34  
25  
20  
17  
-
-
-
-
-
200  
43  
31  
25  
21  
ns  
ns  
ns  
I
1
to Q  
Figures 1,3  
tPHZ, tPLZ Propagation delay, OE to V = 0 V or V  
1.2  
2.0  
2.7  
3.0  
4.5  
-
-
-
-
-
160  
31  
23  
20  
17  
-
-
-
-
-
170  
39  
29  
24  
20  
-
-
-
-
-
200  
48  
36  
29  
24  
I
1
Q
Figures 2,4  
tPZH, tPZL Propagation delay, OE to V = 0 V or V  
1.2  
2.0  
2.7  
3.0  
4.5  
-
-
-
-
-
140  
26  
20  
16  
14  
-
-
-
-
-
160  
34  
25  
20  
17  
-
-
-
-
-
180  
43  
31  
25  
21  
I
1
Q
Figures 2,4  
CI  
Input capacitance  
5.5  
5.5  
-
-
7.0*  
50*  
-
-
-
-
-
-
-
-
pF  
pF  
CPD  
Power dissipation  
V = 0 V or VCC  
I
capacitance (per flip-flop)  
* T = 25oC  
TEST POINT  
TEST POINT  
1 k  
Connect to V when  
CC  
and t  
PZL  
DEVICE  
UNDER  
TEST  
OUTPUT  
testing t  
OUTPUT  
PLZ  
DEVICE  
UNDER  
TEST  
Connect to GND when  
testing t and t  
*
*
PHZ  
PZH  
C
C
L
L
* Includes all probe and jig capacitance  
* Includes all probe and jig capacitance  
Figure 1. Test Circuit  
Figure 2. Test Circuit  
TIMING REQUIREMENTS(CL=50 pF, tr=tf=2.5 ns)  
INTEGRAL  
4
IN74LV574  
Test  
VCC  
V
Guaranteed Limit  
Symbol  
Parameter  
conditions  
-40°C to  
25°C  
85°C  
125°C  
max  
Unit  
min max  
min  
max min  
Pulse Width, Clock (high)  
tw  
V = 0 V or V  
Figures 1,3  
1.2  
2.0  
2.7  
3.0  
4.5  
120  
29  
21  
17  
15  
-
-
-
-
-
ns  
I
1
34  
25  
20  
-
-
-
41  
30  
24  
-
-
-
Setup Time, Data to Clock  
tsu  
V = 0 V or V  
Figures 1,5  
1.2  
2.0  
2.7  
3.0  
4.5  
40  
19  
14  
11  
9
-
-
-
-
-
ns  
I
1
22  
16  
13  
-
-
-
26  
19  
15  
-
-
-
Hold Time, Clock to Data  
Clock Frequency  
th  
V = 0 V or V  
Figures 1,5  
1.2  
2.0  
2.7  
3.0  
5
5
5
5
-
-
-
-
5
5
5
5
-
-
-
-
5
5
5
5
-
-
-
-
ns  
I
1
fc  
V = 0 V or V  
1.2  
2.0  
2.7  
3.0  
4.5  
-
-
-
-
-
2
MHz  
I
1
Figures 1,3  
17  
21  
27  
31  
-
-
-
15  
19  
24  
-
-
-
12  
16  
20  
VOL and VOH are the typical output voltage drop that occur with the output load.  
Figure 3. Switching Waveforms  
INTEGRAL  
5
IN74LV574  
Figure 4. Switching Waveforms  
Figure 5. Switching Waveforms  
Temperature, °C  
INTEGRAL  
6
IN74LV574  
-40°C to 25  
85  
125  
Level of a signal  
V
%
V
%
V
%
1.2  
2.0  
2.7  
3.0  
4.5  
1.2  
2.0  
2.7  
3.0  
4.5  
1.2  
2.0  
2.7  
3.0  
4.5  
1.2  
2.0  
2.7  
3.0  
4.5  
1.2  
2.0  
2.7  
3.0  
4.5  
1.2  
2.0  
2.7  
3.0  
4.5  
0.6  
1.0  
1.5  
1.5  
2.25  
0.6  
1.0  
1.5  
1.5  
2.25  
0.32  
0.4  
0.55  
0.6  
0.85  
0.88  
1.5  
-
-
-
-
-
1.2  
2.0  
2.7  
3.0  
4.5  
0.6  
1.0  
1.5  
1.5  
2.25  
0.6  
1.0  
1.5  
1.5  
2.25  
0.37  
0.45  
0.6  
0.65  
0.90  
0.78  
1.4  
-
-
-
-
-
1.2  
2.0  
2.7  
3.0  
4.5  
0.6  
1.0  
1.5  
1.5  
2.25  
0.6  
1.0  
1.5  
1.5  
2.25  
0.37  
0.45  
0.65  
0.7  
1.0  
0.68  
1.3  
-
-
-
-
-
V1  
50  
50  
56  
56  
50  
50  
50  
58  
52  
50  
12  
11  
12  
11  
12  
88  
88  
87.5  
88  
88  
50  
50  
56  
56  
50  
50  
50  
60  
53  
50  
12.5  
11  
12.5  
11  
12  
86.5  
87.5  
87  
88  
88  
50  
50  
56  
56  
50  
50  
50  
62  
55  
50  
12.5  
11  
12.7  
11.5  
11  
85  
86.5  
86  
87.5  
88  
VM  
INPUTS  
VM  
OUTPUTS  
VX  
VY  
2.1  
2.3  
3.45  
2.0  
2.2  
3.35  
1.9  
2.1  
3.25  
EXPANDED LOGIC DIAGRAM  
CHIP PAD DIAGRAM  
INTEGRAL  
7
IN74LV574  
Chip marking  
ÊÁLV574  
15  
18  
16  
14  
17  
13  
19  
20  
12  
11  
10  
01  
02  
09  
03 04  
08  
06 07  
05  
Y
(0,0)  
1.9 + 0.03  
X
Location of marking (mm): left lower corner x=1.656, y=1.353.  
Chip thickness: 0.46 ± 0.02 mm, (0.35 ± 0.02 mm – for SOIC).  
PAD LOCATION  
Location (left lower corner), mm  
Pad No  
Symbol  
Pad size, mm  
X
Y
0.545  
0.229  
0.120  
0.120  
0.120  
0.120  
0.120  
0.120  
0.314  
0.533  
0.839  
1.108  
1.274  
1.274  
1.274  
1.274  
1.274  
1.274  
1.108  
0.854  
01  
02  
03  
04  
05  
06  
07  
08  
09  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Output enable  
D 0  
0.128  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.108 x0.108  
0.128  
0.330  
0.576  
0.738  
1.054  
1.216  
1.466  
1.682  
1.682  
1.682  
1.682  
1.422  
1.149  
0.971  
0.811  
0.633  
0.360  
0.128  
0.128  
D 1  
D 2  
D 3  
D 4  
D 5  
D 6  
D 7  
GND  
Clock  
Q 7  
Q 6  
Q 5  
Q 4  
Q 3  
Q 2  
Q 1  
Q 0  
VCC  
Note: Pad location is given as per metallization layer  
INTEGRAL  
8
厂商 型号 描述 页数 下载

INTEGRAL

 		IZ7007 电路的电子计步器 - ergmeter[ Circuit for electron pedometer - ergmeter ] 8 页

INTEGRAL

 		IZ7008 8位微控制器与LCD驱动器[ 8-BIT MICROCONTROLLER WITH LCD DRIVER ] 16 页

INTEGRAL

 		IZ7010 电路是否电子计步器 - 测力计[ CIRCUIT FOR ELECTRON PEDOMETER - ERGOMETER ] 14 页

INTEGRAL

 		IZ7406 六反相缓冲器/带集电极开路高压输出驱动程序[ Hex Inverter Buffers/Drivers with Open-Collector High-Voltage Outputs ] 4 页

INTEGRAL

 		IZ74HC157A 四2输入数据选择器/多路复用器[ Quad 2-Input Data Selectors/Multiplexer ] 6 页

INTEGRAL

 		IZ74HC174A 六路D触发器与普通时钟和复位高性能硅栅CMOS[ Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS ] 6 页

INTEGRAL

 		IZ74HC21A 两个4输入与门[ Dual 4-Input AND Gate ] 5 页

INTEGRAL

 		IZ74HC221AZ 双单稳多谐振荡器[ DUAL MONOSTABLE MULTIVIBRATOR ] 7 页

INTEGRAL

 		IZ74HCT21A 两个4输入与门[ Dual 4-Input AND Gate ] 5 页

INTEGRAL

 		IZ74HCT27A 三路3输入NOR门[ Triple 3-Input NOR Gate ] 5 页

购物指南

支付方式

配送服务

售后服务

发票须知

优惠券使用规则

特色服务

PCBA制造

国产品牌推荐

国产料号替代

质量保证

技术资料

行业资讯

关于我们

关于壹壹捌

联系我们

联系我们

服务热线：400-618-9990

企业邮箱：sales@ic118.com

服务时间：周一至周六 8:30-17:30

壹壹捌官方微信号

PDF索引：

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

0

1

2

3

4

5

6

7

8

9

IC型号索引：

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

0

1

2

3

4

5

6

7

8

9

Copyright 2024 gkzhan.com Al Rights Reserved 京ICP备06008810号-21 京

深圳网络警察报警平台
公共信息安全网络监察
经营性网站备案信息
不良信息举报中心
工商网监电子标识
全国公安机关备案
0.153762s