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IZ7008

型号:

IZ7008

描述:

8位微控制器与LCD驱动器[ 8-BIT MICROCONTROLLER WITH LCD DRIVER ]

品牌:

INTEGRAL[ INTEGRAL CORP. ]

页数:

16 页

PDF大小:

445 K

IZ7008  
8-BIT MICROCONTROLLER WITH LCD DRIVER  
IZ7008 is one-chip 8-bit microcontroller made by CMOS technology. The microcon-  
troller is multi-purpose and can be used in electronic watch, data acquisition systems, con-  
trol systems. Low consumption power and full static CMOS logic allow to use MC in inde-  
pendent systems with limited energy consumption.  
Technical characteristics of IZ7008:  
ALU bit capacity  
RAM size  
– 8 bits  
– 40 bytes  
ROM size  
– 1,5 К of commands (16–bit instructions)  
– 30 types of commands  
– 7 levels  
RISC commands system  
Stack depth  
Interrupter  
– from 8- inputs and three timers  
Maximum number of the controlled  
LCD segments  
– 128 (32 LCD control drivers  
at multiplex levels  
1/2,1/3,1/4)  
Operation temperature range -20°С to +70 °С.  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
1
IZ7008  
Electrical parameters at 1.5V supply  
Absolute maximum and maximum ratings  
Parameter, unit  
Symbol  
Maximum ratings  
Absolute maximum ratings  
Value  
Value  
min  
1,2  
max  
1,8  
min  
-0,3  
max  
2,0  
Primary supply voltage from  
voltage source, V  
UCC1  
Secondary supply voltage, V  
High input voltage, V  
UCC2  
UIH  
UIL  
2UCC1-0,3  
UCC1-0,3  
Uss  
2UCC1  
UCC1  
Uss+0,3  
-0,3  
-0,3  
-0,3  
4,0  
UCC1+0,3  
UCC1+0,3  
Low input voltage, V  
Cycle of command execution is not more than 150 mks at supply voltage 1.2V, and  
100 mks at supply voltage 1.5V.  
IC operation is not guaranteed under absolute maximum conditions, it's guaranteed under  
maximum conditions.  
Electrical parameters ( Та = 25°С )  
Parameter, unit  
Symbol  
UOL  
Test  
Value  
Note  
1,2  
conditions  
min  
max  
Low output voltage on alarm-  
clock output, V  
High output voltage on alarm-  
clock output, V  
U
СС1=1.2V  
0.2  
IOL=200mkA  
СС1=1.2V  
UOH  
U
1.0  
IOH=-200mkA  
Dynamic consumption current in  
shutdown conditions, mkA  
Low input current on buttons  
inputs, mkA  
IСС0  
U
СС1=1,5V  
-
-
-
-
1,3  
10  
IIL  
U
СС1=1,8V  
UIL=0,3V  
Oscillator start-up voltage, V  
Uosc  
Uosp  
Control time 3  
1,35  
1,2  
2
2
sec  
-
Oscillator supression voltage, V  
Notes:  
1 Dynamic consumption current should be measured without load.  
2 The parameters are controlled with oscillator crystal with oscillator nominal frequency 32768 Hz  
at capacitance values on oscillator input OSCI not more than 6pF, on output OSCO - not more  
than 3pF.  
3 Nominal value of integrated capacitances on outputs OSCI and OSCO - 12pF and 12pF(crystal  
load capacity CL=6 pF).  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
2
IZ7008  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
3
IZ7008  
MICROCONTROLLER STRUCTURE  
ROM  
Internal ROM contains 1536 commands (16–bit instructions) at the addresses from 0x000  
to 0x5FF. ROM area in the range from 0x000 to 0x0FF (256 commands) and from 0x3FE to  
0x4A8 (178 commands) is reserved for interruptions processing programs, system reset and mi-  
crocontroller testing. User's program if mainly located at the addresses from 0x100 to 0x3FD and  
from 0x4AA to 0x5FF (1110 commands).  
MICROCONTROLLER REGISTER RAM  
RAM is organized as banks by 8 registers and contains internal function registers, data  
RAM, special registers and data memory, directly displayed on LCD.  
Microcontroller internal function registers are in the address area from 0x000 to 0x007  
(bank 00). Their purpose:  
R0, R1, R2, R3 - accumulators;  
R4, R5, R6 - base address registers BL, BM, BH of storing number of addressed bank;  
R7- register of microcontroller state (RGS).  
Internal data RAM (RAM) of 40 bytes is in the address space from 0x008 to 0x02F (banks  
01, 02, 03, 04, 05).  
RAM registers addressing.  
RO-R3, R4 (or BL), R5 (or BM), R6 (or BH), R8-R1F - names of RAM registers in the  
commands at direct addressing. For registers RO-R7 only direct addressing is possible. For regis-  
ters R8-RF (or L0-L7), R10-R17 (or M0-M7), R18-R1F (or H0-H7) direct addressing is possible  
only if bit 0 in state register RGS (R7) is reset into 0, i.e. (R7_0)=0.  
BL, BM, BH – base address registers (R4, R5, R6 respectively). At index register address-  
ing the contents of base registers defines data bank number. At index addressing of RAM registers  
the contents of base registers defines data bank number.  
L0-L7, M0-M7, H0-H7 – names of RAM registers in commands at index addressing. For  
names of registers LO-L7 data bank number is defined by contents of base register BL, for names  
of registers MO-M7 data bank number is defined by contents of base register BM, for names of  
registers HO-H7 data bank number is defined by contents of base register BH. To calculate physi-  
cal address, the contents of base register indicated in the command should be multiplied by 8 and  
a number from 0 to 7 should be added respectively. For example: when recording in the command  
«M5» the physical address is equal to ((BM)*8+5).  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
4
IZ7008  
Allocation of RAM and internal function registers addresses  
Bank  
00  
N of reg-  
Symbol at  
Symbol at index  
addressing  
Description  
ister in  
Address  
direct  
the bank  
addressing  
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
0x000  
0x001  
0x002  
0x003  
0x004  
0x005  
0x006  
0x007  
0x008  
0x009  
0x00A  
0x00B  
0x00C  
0x00D  
0x00E  
0x00F  
0x010  
R0  
-
Accumulator  
Accumulator  
R1  
-
R2  
-
Accumulator  
R3  
-
Accumulator  
R4 or BL  
-
Base register BL  
Base register BM  
Base register BH  
State register  
R5 or BM  
-
R6 or BH  
-
R7  
-
R8 или L0  
L0,M0,H0  
L1,M1,H1  
L2,M2,H2  
L3,M3,H3  
L4,M4,H4  
L5,M5,H5  
L6,M6,H6  
L7,M7,H7  
L0,M0,H0  
R9 или L1  
RA или L2  
01  
RB или L3  
Data RAM  
RC или L4  
RD или L5  
RE или L6  
RF или L7  
R10 илиM0  
M7  
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0x011  
0x012  
0x013  
0x014  
0x015  
0x016  
0x017  
0x018  
0x019  
0x01A  
0x01B  
0x01C  
0x01D  
0x01E  
0x01F  
0x020  
0x021  
0x022  
0x023  
0x024  
0x025  
0x026  
0x027  
0x028  
0x029  
0x02A  
0x02B  
0x02C  
0x02D  
0x02E  
0x02F  
R11 илиM1  
L1,M1,H1  
L2,M2,H2  
L3,M3,H3  
L4,M4,H4  
L5,M5,H5  
L6,M6,H6  
L7,M7,H7  
L0,M0,H0  
L1,M1,H1  
L2,M2,H2  
L3,M3,H3  
L4,M4,H4  
L5,M5,H5  
L6,M6,H6  
L7,M7,H7  
L0,M0,H0  
L1,M1,H1  
L2,M2,H2  
L3,M3,H3  
L4,M4,H4  
L5,M5,H5  
L6,M6,H6  
L7,M7,H7  
L0,M0,H0  
L1,M1,H1  
L2,M2,H2  
L3,M3,H3  
L4,M4,H4  
L5,M5,H5  
L6,M6,H6  
L7,M7,H7  
R12 илиM2  
02  
03  
04  
05  
R13 илиM3  
Data RAM  
Data RAM  
Data RAM  
Data RAM  
R14 илиM4  
R15 илиM5  
R16 илиM6  
R17 илиM7  
R18 илиH0  
R19 илиH1  
R1A илиH2  
R1B илиH3  
R1C илиH4  
R1D илиH5  
R1E илиH6  
R1F илиH7  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
5
IZ7008  
Index addressing is possible for all registers (except RO-R7) at setting bit 0 into 1 in the  
state register RGS (R7), i.e. at (R7_0)=1.  
State register RGS (register R7 with address 0x007).  
Bit  
Symbol  
MFR1  
FR3  
Description and function  
State at supply  
switch.  
0
R7_7  
R7_6  
R7_5  
R7_4  
1 – masking of setting into 1 of interruption request flag  
FR1 on timer 1 cleaning  
Interruption request flag from timer 3  
(set into 1 on timer cleaning front)  
Interruption request flag from timer 2  
(set into 1 on timer cleaning front)  
Interruption request flag from timer 1  
(set into 1 on timer cleaning front)  
1 – at supply voltage less than reference  
0
0
0
FR2  
FR1  
R7_3  
R7_2  
SVD  
0
0
SVD/LAMP 0- switching-off supply voltage detector  
ON  
1- switching-on supply voltage detector  
0 –sound inhibit (fixing output OUT_AL into 0)  
1 – applying on output OUT_AL frequency 4096 Hz  
under tune off mode or note frequency in tune foramtion  
mode  
R7_1  
AL_EN  
0
R7_0  
INDEX  
0 –RAM index addressing inhibit, enable direct address-  
ing of registers R8-R1F  
0
1 – enable RAM index addressing, inhibit direct ad-  
dressing of registers R8-R1F  
Memory of data, displayed on LCD of maximum size 128 bits is located in address space  
from 0x7E8 to 0x7F7 (banks FD, FE). For LCD memory only index addressing is possible. Con-  
figuration of LCD memory at multiplexing level at 1/4 is shown in the figure  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
6
IZ7008  
Bank  
FD  
Addres  
s
Bit_7  
Bit_6  
Bit_5  
Bit_4  
Bit_3  
Bit_2  
Bit_1  
Bit_0  
COM  
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0x7E8  
0x7E9  
0x7EA  
0x7EB  
0x7EC  
0x7ED  
0x7EE  
0x7EF  
0x7E0  
0x7E1  
0x7E2  
0x7E3  
0x7E4  
0x7E5  
0x7E6  
0x7E7  
SEG02 SEG04  
SEG02 SEG04  
SEG02 SEG04  
SEG02 SEG04  
SEG01 SEG03  
SEG01 SEG03  
SEG01 SEG03  
SEG01 SEG03  
SEG31 SEG29  
SEG31 SEG29  
SEG31 SEG29  
SEG31 SEG29  
SEG32 SEG30  
SEG32 SEG30  
SEG32 SEG30  
SEG32 SEG30  
SEG06  
SEG06  
SEG06  
SEG06  
SEG05  
SEG05  
SEG05  
SEG05  
SEG27  
SEG27  
SEG27  
SEG27  
SEG28  
SEG28  
SEG28  
SEG28  
SEG08  
SEG08  
SEG08  
SEG08  
SEG07  
SEG07  
SEG07  
SEG07  
SEG25  
SEG25  
SEG25  
SEG25  
SEG26  
SEG26  
SEG26  
SEG26  
SEG10 SEG12  
SEG10 SEG12  
SEG10 SEG12  
SEG10 SEG12  
SEG09 SEG11  
SEG09 SEG11  
SEG09 SEG11  
SEG09 SEG11  
SEG23 SEG21  
SEG23 SEG21  
SEG23 SEG21  
SEG23 SEG21  
SEG24 SEG22  
SEG24 SEG22  
SEG24 SEG22  
SEG24 SEG22  
SEG14  
SEG14  
SEG14  
SEG14  
SEG13  
SEG13  
SEG13  
SEG13  
SEG19  
SEG19  
SEG19  
SEG19  
SEG20  
SEG20  
SEG20  
SEG20  
SEG16  
SEG16  
SEG16  
SEG16  
SEG15  
SEG15  
SEG15  
SEG15  
SEG17  
SEG17  
SEG17  
SEG17  
SEG18  
SEG18  
SEG18  
SEG18  
Com 1  
Com 2  
Com 3  
Com 4  
Com 1  
Com 2  
Com 3  
Com 4  
Com 1  
Com 2  
Com 3  
Com 4  
Com 1  
Com 2  
Com 3  
Com 4  
FE  
When multiplex level is 1/3 registers with addresses 0x7EB , 0x7EF, 0x7F3, 0x7F7 can be  
used as data memory, and when multiplex level is 1/2 additionally as data memory can be used  
the registers with addresses 0x7EA , 0x7E, 0x7F2, 0x7F6.  
TIMERS UNIT AND PORT  
System registers of timers unit have the addresses 0x7D8- 0x7DD (bank FB), of input-  
output unit have the addresses 0x7E0- 0x7E4 (bank FC). For system registers only index  
addressing is possible.  
Bank N Addres  
s
Description  
Bit_7 Bit_6  
Bit_5  
Bit_4 Bit_3  
Bit_2  
Bit_1 Bit_0  
W/R  
W/R  
0
0x7D8  
Timers control register  
IN1  
T3  
IN0  
T3  
IN1  
T2  
IN0  
T2  
CLR  
T3  
CLR  
T2  
EN  
T3  
EN  
T2  
1
2
3
4
5
0
0x7D9  
0x7DA  
0x7DB  
0x7DC  
0x7DB  
0x7E0  
Timer Т1  
Timer Т2  
Timer Т3  
T1_7 T1_6 T1_5 T1_4 T1_3 T1_2 T1_1 T1_0  
T2_7 T2_6 T2_5 T2_4 T2_3 T2_2 T2_1 T2_0  
T3_7 T3_6 T3_5 T3_4 T3_3 T3_2 T3_1 T3_0  
R
R
R
FB  
FC  
Setting register Т2  
Setting register Т3  
Register  
KT2_7 KT2_6 KT2_5 KT2_4 KT2_3 KT2_2 KT2_1 KT2_0 W/R  
KT3_7 KT3_6 KT3_5 KT3_4 KT3_3 KT3_2 KT3_1 KT3_0 W/R  
M1  
M0  
M1  
M0  
M1  
M0  
M1  
M0  
W/R  
settings PORT 1-4  
Register  
Setting PORT4 Setting PORT3 Setting PORT2 Setting PORT1  
M1 M0 M1 M0 M1 M0 M1 M0  
Setting PORT8 Setting PORT7 Setting PORT6 Setting PORT5  
1
2
0x7E1  
0x7E2  
W/R  
Settings PORT 5-8  
Register of flags EN/CLR  
1-interruption enable  
0-interruption request reset  
Register (indicator) of re-  
quests for interruption from  
bits PORT  
EN/CL EN/CL EN/CL EN/CL EN/CL EN/CL EN/CL EN/CL W/R  
IR8  
IR8  
IR7  
IR7  
IR6  
IR6  
IR5  
IR5  
IR4  
IR4  
IR3  
IR3  
IR2  
IR2  
IR1  
IR1  
3
4
0x7E3  
0x7E4  
R
R
Register (indicator) of in-  
put/output port bits state  
НЕ  
НЕ  
НЕ  
НЕ  
НЕ  
НЕ  
НЕ  
НЕ  
PORT8 PORT7 PORT6 PORT5 PORT4 PORT3 PORT2 PORT1  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
7
IZ7008  
ORGANISATION OF INTERRUPTIONS.  
The interruptions may be initiated:  
а) by external devices from bits РORT1-PORT8;  
б) by internal devices (timers T1,T2,T3).  
The initial addresses of subprograms of processing interruptions as their priority decrease are  
shown in the table.  
Address  
0x000  
0x08F  
0x09F  
0x0AF  
0x0CF  
0x0BF  
0x0DF  
0x0EF  
0x0FF  
Source of interruption  
Supply switching on  
Timers 1, 2 and 3 simultaneously  
Timers 2 and 3 simultaneously  
Timers 1 and 3 simultaneously  
Timers 1 and 2 simultaneously  
Timer 3  
Note  
Simultaneously with timers there  
may be initiated interruption from  
input port which should be taken  
into consideration in interrupt ser-  
vice routine  
Timer 2  
Timer 1  
Input / output port  
Interruptions are executed after complete execution of the command of main program when there  
is a request. Interruptions are inhibited after the jump instructions: JMP, JMI and JC, JNC, JZ, JNZ  
when executing jump conditions, commands JSR of return from subprogram.  
Interruptions from port bits may be initiated if the corresponding bit of interrupt enabling register in  
register RFC_2 is program-set into 1.  
At the same time, reading the register RFC_3 (read-only) allows to display from which port bits  
interrupt requests are called. Interrupt request from any port bit can be reset after executing inter-  
rupt service routine by recording 0 into the corresponding bit in the register RFC_2 with the follow-  
ing setting of this bit into 1 for enabling thhe further inmterrupt request. Each port bit can be indi-  
vidually tuned by presetting bits M1, M0 in the registers RFC_3 and RFC_3 with the following pos-  
sible options of internal states.  
Bits  
Internal  
port state  
Interrupts  
Notes  
M1  
0
M0  
0
OUT ZL (high-impedance 0)  
Interrupts from  
external actions  
inhibited  
By mask «programming» internal level ZL  
(high-impedance 0) can be disconnected  
0
1
OUT L  
( “strong” zero)  
IN RL (resistive 0)  
IN RH  
1
1
0
1
Interrupts from  
external actions  
enabled  
Interrupts evocation under high level  
Interrupts evocation under low level  
(resistive 1)  
Mask «programming» can disconnect internal level (ZL, RL,RH) with possible replacement of  
them by external resistors.  
Reading of the register R FC_4 (read-only) allows to display state of all port bits given either, one  
or another external action.  
External actions may be the following:  
H
– «strong» 1  
HR – «weak» 1  
– «strong» 0  
L
LR – «weak» 0  
Z
– high impedance state  
State of port bits under all possible combinations of external actions and internal states are shown  
in the table  
Internal  
state  
External action  
H
1
1
HR  
1
L
0
0
LR  
0
Z
1
0
IN RH  
IN RL  
1
0
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
8
IZ7008  
OUT L  
1
1
0
1
0
0
0
0
0
0
OUT ZL  
It's assumed that internal state and external actions are levelized stronger as for external actions.  
MC includes three timers-counters T1, T2, T3. All the timers are binary octal counters with  
weight 128, 64, 32, 16, 8, 4, 2, 1.  
Timer Т1 (register RFB_1 with address 0x7D9 )  
Timer Т1 is 8-bit counter with division factor 256 . The frequency of quartz oscillator 32768 Hz is  
applied on the counter input.  
The counter is for reading only. Data read out on data bus is shown below.  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
T1_7  
T1_6  
T1_5  
T1_4  
T1_3  
T1_2  
T1_1  
T1_0  
128 Hz  
256 Hz  
512 Hz  
1024 Hz  
2048 Hz  
4096 Hz  
8192 Hz  
16384 Hz  
When reading the counter, the problems related to the possibility of reading changeable data, may  
occur. For the correct reading, if necessary, reading of data can be done several times in succes-  
sion with the following comparison of the results. At the reset when switching on the supply, timer  
T1 is cleared (the counter is reset into zero state).  
After execution of HLT command timer counter is reset and fixed in zero state (in zero state input  
OCSI is also fixed) until the next program starts (from external actions on IN_PORT).  
At ripple-through carry of timer T1 which happens with period of 1/128 sec, FrT1 "short" pulse is  
formed, it sets interrupt request flag FR1 in the state register R7 into 1 (bit 4 of the state register  
R7), if masking bit of timer MFR1 (bit 7 of the state register R7) is reset into 0.  
When setting masking bit of oftimer MFR1 into 1 state of flag FR1 doesn't change, but its setting  
during the next ripple-through carry on timer counter T1 is inhibited. There can be done repro-  
gramming of T1 (by mask "programming") ensuring setting of FR1 flag with periods of 1/32 sec (at  
LCD multiplex 1/4) or 6/256 sec (at LCD multiplex 1/3). The data read-out on data bus can be the  
following:  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
T1_7  
32 Hz  
T1_6  
T1_5  
T1_4  
T1_3  
T1_2  
T1_1  
T1_0  
256 Hz  
( 64 Hz)  
512 Hz  
1024 Hz  
2048 Hz  
4096 Hz  
8192 Hz  
16384 Hz  
or:  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
T1_7  
T1_6  
T1_5  
T1_4  
T1_3  
T1_2  
T1_1  
T1_0  
256/6 Hz  
256 Hz  
512 Hz  
1024 Hz  
2048 Hz  
4096 Hz  
8192 Hz  
16384 Hz  
Timers Т2, Т3 (registers RFB2, RFB3 with addresses 0x7DA and 0x7DB)  
Timers Т2, Т3 are 8-bit counters with programmable division factor from setting registers КТ2 (reg-  
ister RFB4 with address 0x7DC), КТ3 (register RFB5 with address 0x7DE) . Division factors are  
programmed from maximum value 256 (when recording 0x00 into registers КТ2, КТ3) to the value  
equal to the contents of registers КТ2, КТ3 (from 0х01 to 0хFF except mode of notes frequency  
forming in timer T2).  
The counters are for reading only. When reading count register the problems related to the possi-  
bility of reading changeable data may occur. For the correct reading, if necessary, reading of the  
data can be done several times in succession with the following comparing of the results.  
When the code equal to the contents of registers KT2, KT3 (or at ripple-through carry when  
recording 0x00 into registers KT2, KT3), timers T2, T3 are cleared (except mode of notes fre-  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
9
IZ7008  
quency forming in timer 2) and "short" pulses FrT2, FrT3 setting respectively interrupt request flag  
FR2 into 1 (bit 5 of the state register R7) and Interrupt request flag FR3 in the states register R7  
(bit 6 of the state register R7) are formed.  
Flag FR2 is not set into mode of notes frequency forming in timer T2 and in mode when  
"short" pulse FrT2 of timer T2 clearing is input signal of timer T3.  
The timers are controlled by timers control register RFBO (address 0x7D8)  
Description of RFBO control register bits:  
Bit  
Symbol  
Description  
After  
reset  
RFBO_7  
IN1-T3  
7,6 bits choose source of timer T3 input signal  
00 – signal of ripple-through carry of timer T1  
0
(«short» pulse FrT1)  
01 – output Т1_3 of timer Т1 (2048Hz)  
10 – signal of clearing timer Т2  
RFBO_6  
RFBO_5  
IN0-T3  
IN1-T2  
(«short» pulse FrT2), in this mode setting of flag FR2 is inhibited  
11 – external signal IN6 (output 06 when disconnecting SEG 01 by mask)  
5,4 bits choose source of timer T2 input signal  
0
0
00 – signal of ripple-through carry of timer Т1  
(«short» pulse FrT1)  
01 – output Т1_3 of timer Т1 (2048Hz)  
10 – signal 65565 Hz (notes frequency forming mode), in this mode setting of FR2 flag  
is inhibited  
RFBO_4  
RFBO_3  
IN0-T2  
0
0
11 –external signal IN6, IN7, IN8 (from outputs 06, 07 or 08 when disconnecting corre-  
sponding SEG 01, SEG 02, SEG 03 by mask)  
CLR-T3  
1-clearing (reset and zero code fixation) of T3 timer counter, reset of FR3 flag  
(except mode, when T3 is clocked by FrТ2 signal; in this mode RFBO_3 and RFBO_1  
shoose source of input signal Т2: 00-IN7, 01-IN6 ,1X –IN8)  
1-clearing (reset and zero code fixation) of T2 timer counter, reset of FR2 flag and T3  
timer with reset of FR3 flag (when T3 is clocked by FrТ2 signal)  
1/0- (count enable) /(count inhibit) Т3 (except mode when Т3 is clocked by FrТ2 signal;  
in this mode RFBO_3 and RFBO_1 shoose source of input signal Т2: 00-IN7, 01-IN6  
,1X –IN8))  
RFBO_2  
RFBO_1  
CLR-T2  
EN-T3  
0
0
RFBO_0  
EN-T2  
1/0- (count enable) / (count inhibit) Т2 (always) and (count enable) / (count inhibit) Т3  
(when T3 is clocked by FrТ2 signal )  
0
Timer Т2 can be used in the mode of notes frequency forming for tunes synthesis. The  
mode is selected when recording code «10» into 5,4 bits of RFBO control register (IN1-T2=1, IN0-  
T2 = 0 ) and timer count enabling.  
RFBO_7  
IN1-T3  
RFBO_6  
IN0-T3  
RFBO_5  
IN1-T2  
RFBO_4  
IN0-T2  
RFBO_3  
CLR-T3  
RFBO_2  
CLR-T2  
RFBO_1  
EN-T3  
RFBO_0  
EN-T2  
X
X
1
0
X
0
X
1
In this mode setting of interrupt request flag FR2 in the state register R7 is inhibited. Signal of  
65565 Hz is applied on counter input.. Notes frequency is formed on counter output (output  
T2_7) and can be applied on external output "AL" at the set into 1 flag AL_EN in the state  
register R7.  
Seven lower counter bits count in the beginning of zero semi-period of note. After reaching  
the code equal to the contents of 7 lower bits of KT2 register, 7 lower bits of the counter are  
cleared but the highest bit is switched into logic 1 and then the note second (unit) semi-  
period is counted in the same way.  
As a result on output the frequency of 65565Hz/2N is formed, where N is number from 2 to  
127, set in 7 lower bits of register KT2. To form notes period with accuracy to one period of  
input frequency 65565 Hz the following possibility is forseen. When setting in register KT2  
the higher bit of KT register in logic 1 when counting the second (unit) semi-period at code  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
10  
IZ7008  
reaching, equal to the contents of 7 lower bits of register KT2, 1-6 bits of timer are set into 0,  
but the lowest bit is set into 1 and, thus, the following zero semi-period of note is "cut" for one  
period of input signal. In this case the frequency equal to 65565 Hz / (2N-1) can be formed.  
Formed notes frequency (output T2_7) can be supplied on external output "AL" at set into 1  
flag AL_EN in the state register R7.  
On output "AL" output T2_7 is also applied (at set into 1 flag AL_EN) at the following state of  
timers control register RFBO:  
RFBO_7  
IN1-T3  
1
RFBO_6  
IN0-T3  
0
RFBO_5  
IN1-T2  
1
RFBO_4  
IN0-T2  
1
RFBO_3  
CLR-T3  
X
RFBO_2  
CLR-T2  
0
RFBO_1  
EN-T3  
X
RFBO_0  
EN-T2  
1
In this mode T2 is clocked by external signal (RC-oscillator), Т3 by clearing signal Т2 («short»  
pulse FrT2) , injection of the signal from output T2_7 on output «AL» is used for testing (meas-  
urement of RC-oscillator frequency).  
Configuration of timers may by the following  
Contents of register  
RFB0  
Input Т2  
Interrupt  
Input Т3  
Interrupt  
Note  
request flag  
request flag  
FR2  
FR3  
0
00000000  
0(no count)  
FrT1  
2048 Hz  
FrT1  
2048 Hz  
65536 Hz  
65536 Hz  
65536 Hz  
0
0(no count)  
FrT1  
State after system reset  
0000C3C2E3E2  
0001C3C2E3E2  
0100C3C2E3E2  
0101C3C2E3E2  
0010C3C2E3E2  
0110C3C2E3E2  
1110C3C2E3E2  
1010C3C2E3E2  
1000XC32XE32  
1001XC32XE32  
0011C3C2E3E2  
0111C3C2E3E2  
1111C3C2E3E2  
10110C320 E32  
10110C321 E32  
10111C32X E32  
+
+
+
FrT1  
+
+
2048 Hz  
2048 Hz  
FrT1  
+
+
+
Set. inhibited  
Set. inhibited  
Set. inhibited  
+
Tune mode  
2048 Hz  
IN6  
+
+
Inhibited combination  
FrT1  
2048 Hz  
0(no count)  
0(no count)  
0(no count)  
IN7  
Set. inhibited  
Set. inhibited  
FrT2  
FrT2  
+
+
+
+
+
+
+
+
-
FrT1  
-
2048 Hz  
IN6  
-
Set. inhibited  
Set. inhibited  
Set. inhibited  
FrT2  
IN6  
IN8  
FrT2  
FrT2  
E2 , E3 - bits (count enable) /(count inhibit) of timer 2 or 3  
E32 bit (count enable) /(count inhibit) of timers 2 and 3 simultaneously  
С2 , С3 - bits of clearing timer 2 or 3  
С32 bit of clearing timers 2 and 3 simultaneously  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
11  
IZ7008  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
12  
IZ7008  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
13  
IZ7008  
IZ7008 pins description  
Contact pad  
No.  
Symbol  
Description  
01  
02  
03  
04  
05  
06  
GND  
IN3  
OSCO  
OSCI  
COM1  
SEG1/  
IN6  
SEG2/  
IN7  
SEG3/  
IN8  
Common output  
Control input  
Output for connecting oscillator crystal  
Input for connecting oscillator crystal  
Output of LCD common electrode control  
Output of LCD sign electrode control /  
Control input*  
Output of LCD sign electrode control /  
Control input*  
Output of LCD sign electrode control /  
Control input*  
07  
08  
09  
10  
11  
12  
13  
SEG4  
SEG5  
SEG6  
SEG7  
SEG8  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
14  
15  
16  
17  
18  
19  
20  
21  
SEG9  
SEG10  
SEG11  
SEG12  
SEG13  
SEG14  
SEG15  
COM3/  
SEG16  
P2/  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD sign electrode control  
Output of LCD common electrode control /  
Output of LCD sign electrode control  
Voltage transducer output/  
22  
EL/  
Electroluminiscent backlighting control output/  
LCD sign electrode ocntrol output/  
Output of LCD common electrode control *  
SEG02/  
COM3  
23  
P1/  
Voltage transducer output/  
IND/  
Electroluminiscent backlighting control output/  
LCD sign electrode ocntrol output/  
Output of LCD common electrode control *  
LCD sign electrode ocntrol output//  
LCD sign electrode ocntrol output/*  
Control input  
COM3/  
SEG16/  
SEG01  
IN2  
24  
25  
26  
27  
28  
IN1  
Control input  
Supply voltage output from voltage source  
Alarm clock control output  
LCD common electrode control output/  
Alarm clock control Inverse output*  
LCD sign electrode control output/  
LCD common electrode control output*  
LCD sign electrode control output  
LCD sign electrode control output  
UCC1  
AL  
COM2/  
NAL  
29  
SEG16/  
COM2  
SEG17  
SEG18  
30  
31  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
14  
IZ7008  
Table continued  
Contact pad  
No.  
Symbol  
Description  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
SEG19  
SEG20  
SEG21  
SEG22  
SEG23  
SEG24  
SEG25  
SEG26  
SEG27  
SEG28  
SEG29  
SEG30  
SEG31  
SEG32  
COM4/  
SEG32  
IN5  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD sign electrode control output  
LCD common electrode control output /  
LCD sign electrode control output *  
Control input  
47  
48  
IN4  
Control input  
LCD - liquid crystal display  
*
- function to be chosen by coding  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
43  
44  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
45  
46  
47  
48  
01  
02  
03  
04  
05  
06  
IZ7008  
09  
07  
08  
10  
11  
14  
15  
16  
17  
18  
13  
12  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
15  
IZ7008  
Chip size: 3420±30 х 2430±30 mkm.  
Chip width: 460±20 mkm.  
Contact pad size 100х100 mkm in «Metallization layer»  
Contact pad  
No.  
Co-ordinates (mkm)  
Contact pad No.  
Co-ordinates (mkm)  
X
Y
X
Y
106  
106  
106  
106  
106  
106  
419  
643  
867  
1091  
1315  
1539  
1763  
1987  
2211  
2435  
2659  
2883  
3216  
3216  
3216  
3216  
3216  
3216  
1068  
891  
721  
552  
382  
212  
105  
105  
105  
105  
105  
105  
105  
105  
105  
105  
105  
105  
275  
444  
614  
784  
953  
1123  
3216  
3216  
3216  
3216  
3216  
3216  
2902  
2678  
2454  
2230  
2006  
1782  
1558  
1334  
1110  
886  
662  
438  
106  
106  
106  
106  
106  
106  
1292  
1462  
1632  
1801  
1971  
2140  
2224  
2224  
2224  
2224  
2224  
2224  
2224  
2224  
2224  
2224  
2224  
2224  
2078  
1908  
1739  
1569  
1400  
1230  
01  
02  
03  
04  
05  
06  
07  
08  
09  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
Korzhenevskogo 12, Minsk, 220064, Republic of Bel-  
arus  
Fax:  
+375 (17) 278 28 22,  
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,  
277 69 16  
E-mail: belms@belms.belpak.minsk.by  
URL: www.bms.by  
16  
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