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LY6164E

型号：

LY6164E

描述：

修订版1.2 8K ×8位高速CMOS SRAM[ Rev. 1.2 8K X 8 BIT HIGH SPEED CMOS SRAM ]

品牌：

LYONTEK[ Lyontek Inc. ]

页数：

13 页

PDF大小：

167 K

下载PDF手册
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
REVISION HISTORY  
Revision  
Rev. 1.0  
Rev. 1.1  
Rev. 1.2  
Description  
Initial Issue  
Revised STSOP Package Outline Dimension  
Revised Test Condition of ISB1/IDR  
Revised VTERM to VT1 and VT2  
Issue Date  
Aug.3.2005  
Mar.26.2008  
Apr.17.2009  
FEATURES ORDERING INFORMATION  
Revised  
&
Lead free and green package available to Green package  
available  
ABSOLUTE MAXIMUN RATINGS  
Deleted TSOLDER in  
ORDERING INFORMATION  
Added packing type in  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
0
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
FEATURES  
GENERAL DESCRIPTION  
The LY6164 is a 65,536-bit high speed CMOS static  
random access memory organized as 8,192 words  
by 8 bits. It is fabricated using very high  
performance, high reliability CMOS technology. Its  
standby current is stable within the range of  
operating temperature.  
„ Fast access time : 8/10/12/15ns  
„ Low power consumption:  
Operating current : 110/100/90/80mA (TYP.)  
Standby current : 1mA (TYP.)  
„ Single 5V power supply  
„ All inputs and outputs TTL compatible  
„ Fully static operation  
The LY6164 is well designed for high speed system  
applications, and particularly well suited for battery  
back-up nonvolatile memory application.  
„ Tri-state output  
„ Data retention voltage : 2.0V (MIN.)  
„ Green package available  
„ Package : 28-pin 300 mil SOJ  
28-pin 300 mil Skinny P-DIP  
The LY6164 operates from a single power supply  
of 5V and all inputs and outputs are fully TTL  
compatible  
28-pin 8mm x 13.4mm STSOP  
PRODUCT FAMILY  
Product  
Family  
Operating  
Temperature  
Power Dissipation  
Speed  
Vcc Range  
Standby(ISB1,TYP.) Operating(Icc,TYP.)  
0 ~ 70℃  
-20 ~ 80℃  
-40 ~ 85℃  
LY6164  
4.5 ~ 5.5V  
4.5 ~ 5.5V  
4.5 ~ 5.5V  
8/10/12/15ns  
8/10/12/15ns  
8/10/12/15ns  
1mA  
1mA  
1mA  
110/100/90/80mA  
110/100/90/80mA  
110/100/90/80mA  
LY6164(E)  
LY6164(I)  
FUNCTIONAL BLOCK DIAGRAM  
PIN DESCRIPTION  
SYMBOL  
DESCRIPTION  
Address Inputs  
A0 - A12  
Vcc  
Vss  
DQ0 – DQ7 Data Inputs/Outputs  
CE#, CE2  
WE#  
OE#  
Chip Enable Inputs  
Write Enable Input  
Output Enable Input  
Power Supply  
8Kx8  
MEMORY ARRAY  
A0-A12  
DECODER  
VCC  
VSS  
Ground  
NC  
No Connection  
I/O DATA  
CIRCUIT  
DQ0-DQ7  
COLUMN I/O  
CE#  
CE2  
WE#  
OE#  
CONTROL  
CIRCUIT  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
1
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
PIN CONFIGURATION  
NC  
A12  
A7  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
Vcc  
WE#  
CE2  
A8  
3
OE#  
A11  
A9  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
A10  
CE#  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
Vss  
DQ2  
DQ1  
DQ0  
A0  
A6  
4
A5  
5
A9  
A8  
A4  
6
A11  
OE#  
A10  
CE#  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
CE2  
WE#  
Vcc  
NC  
A12  
A7  
A6  
A5  
A4  
A3  
A3  
7
LY6164  
A2  
8
A1  
9
A0  
10  
11  
12  
13  
14  
A1  
A2  
DQ0  
DQ1  
DQ2  
Vss  
STSOP  
Skinny PDIP/SOJ  
ABSOLUTE MAXIMUN RATINGS*  
PARAMETER  
SYMBOL  
VT1  
RATING  
-0.5 to 6.5  
UNIT  
V
Voltage on VCC relative to VSS  
Voltage on any other pin relative to VSS  
VT2  
-0.5 to VCC+0.5  
0 to 70(C grade)  
-20 to 80(E grade)  
-40 to 85(I grade)  
-65 to 150  
V
℃
Operating Temperature  
TA  
℃
W
Storage Temperature  
Power Dissipation  
DC Output Current  
TSTG  
PD  
1
IOUT  
50  
mA  
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this  
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.  
TRUTH TABLE  
CE#  
H
CE2  
X
OE#  
X
WE#  
X
SUPPLY CURRENT  
MODE  
I/O OPERATION  
High-Z  
ISB1  
ISB1  
ICC  
ICC  
ICC  
Standby  
X
L
X
X
High-Z  
L
H
H
H
Output Disable  
Read  
High-Z  
L
H
L
H
DOUT  
L
H
X
L
Write  
DIN  
Note: H = VIH, L = VIL, X = Don't care.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
2
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
DC ELECTRICAL CHARACTERISTICS  
SYMBOL  
TEST CONDITION  
MIN.  
4.5  
2.4  
- 0.5  
- 1  
TYP. *4  
5.0  
MAX.  
5.5  
VCC+0.5  
0.8  
UNIT  
PARAMETER  
Supply Voltage  
VCC  
V
V
V
*1  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
Output Leakage  
Current  
VIH  
-
-
-
*2  
VIL  
V
V
CC ≧ VIN ≧ VSS  
CC ≧ VOUT ≧ VSS,  
Output Disabled  
ILI  
1
A
µ
ILO  
- 1  
-
1
A
µ
Output High Voltage  
Output Low Voltage  
VOH IOH = -1mA  
VOL IOL = 2mA  
Cycle time = Min.  
CE# = VIL and CE2 = VIH,  
I/O = 0mA  
Other pins at VIH or VIL  
2.4  
-
-
-
V
V
mA  
mA  
mA  
mA  
-
-
-
-
-
0.4  
190  
180  
160  
110  
100  
90  
-8  
-10  
-12  
-15  
Average Operating  
Power supply Current  
ICC  
I
80  
140  
Standby Power  
Supply Current  
Notes:  
≦
CE# ≧VCC-0.2V or CE2 0.2V  
Other pins at 0.2V or VCC-0.2V  
ISB1  
-
1
5
mA  
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.  
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.  
3. Over/Undershoot specifications are characterized, not 100% tested.  
4. Typical values are included for reference only and are not guaranteed or tested.  
℃
Typical valued are measured at VCC = VCC(TYP.) and TA = 25  
CAPACITANCE (TA = 25℃, f = 1.0MHz)  
PARAMETER  
Input Capacitance  
Input/Output Capacitance  
SYMBOL  
MIN.  
-
-
MAX  
6
8
UNIT  
pF  
pF  
CIN  
CI/O  
Note : These parameters are guaranteed by device characterization, but not production tested.  
AC TEST CONDITIONS  
Input Pulse Levels  
0.2V to VCC - 0.2V  
Input Rise and Fall Times  
Input and Output Timing Reference Levels  
Output Load  
3ns  
1.5V  
CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
3
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
AC ELECTRICAL CHARACTERISTICS  
(1) READ CYCLE  
PARAMETER  
SYM.  
UNIT  
LY6164-8 LY6164-10 LY6164-12 LY6164-15  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low-Z  
Output Enable to Output in Low-Z  
Chip Disable to Output in High-Z  
Output Disable to Output in High-Z  
Output Hold from Address Change  
tRC  
tAA  
8
-
-
-
8
8
4
-
10  
-
-
-
10  
10  
5
-
-
5
5
-
12  
-
-
-
12  
12  
6
-
-
6
6
-
15  
-
-
-
15  
15  
7
-
-
7
7
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tACE  
tOE  
tCLZ  
tOLZ  
tCHZ  
tOHZ  
tOH  
-
-
-
-
*
*
*
*
2
0
-
-
3
2
0
-
-
3
3
0
-
-
3
4
0
-
-
3
-
4
4
-
(2) WRITE CYCLE  
PARAMETER  
SYM.  
UNIT  
LY6164-8  
LY6164-10 LY6164-12 LY6164-15  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
Write Cycle Time  
tWC  
8
6.5  
6.5  
0
6.5  
0
5
0
1.5  
-
-
-
-
-
-
-
-
-
-
5
10  
8
8
0
8
0
6
0
2
-
-
-
-
-
-
-
-
-
-
6
12  
10  
10  
0
9
0
7
0
3
-
-
-
-
-
-
-
-
-
-
15  
12  
12  
0
10  
0
8
0
4
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write Time  
Output Active from End of Write  
Write to Output in High-Z  
tAW  
tCW  
tAS  
tWP  
tWR  
tDW  
tDH  
tOW  
*
*
tWHZ  
7
8
*These parameters are guaranteed by device characterization, but not production tested.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
4
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
TIMING WAVEFORMS  
READ CYCLE 1 (Address Controlled) (1,2)  
tRC  
Address  
Dout  
tAA  
tOH  
Previous Data Valid  
Data Valid  
READ CYCLE 2 (CE# and CE2 and OE# Controlled) (1,3,4,5)  
tRC  
Address  
tAA  
CE#  
tACE  
CE2  
OE#  
tOE  
tOLZ  
tOH  
tOHZ  
tCHZ  
tCLZ  
High-Z  
High-Z  
Dout  
Data Valid  
Notes :  
1.WE# is high for read cycle.  
2.Device is continuously selected OE# = low, CE# = low., CE2 = high.  
3.Address must be valid prior to or coincident with CE# = low, CE2 = high; otherwise tAA is the limiting parameter.  
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
5
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)  
tWC  
Address  
tAW  
CE#  
tCW  
CE2  
WE#  
Dout  
Din  
tAS  
tWP  
tWR  
tWHZ  
TOW  
High-Z  
(4)  
(4)  
tDW  
tDH  
Data Valid  
WRITE CYCLE 2 (CE# and CE2 Controlled) (1,2,5,6)  
tWC  
Address  
tAW  
CE#  
CE2  
tAS  
tWR  
tCW  
tWP  
WE#  
Dout  
Din  
tWHZ  
High-Z  
(4)  
tDW  
tDH  
Data Valid  
Notes :  
1.WE#, CE# must be high or CE2 must be low during all address transitions.  
2.A write occurs during the overlap of a low CE#, high CE2, low WE#.  
3.During a WE#controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be  
placed on the bus.  
4.During this period, I/O pins are in the output state, and input signals must not be applied.  
5.If the CE#low transition and CE2 high transition occurs simultaneously with or after WE# low transition, the outputs remain in a high  
impedance state.  
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
6
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
DATA RETENTION CHARACTERISTICS  
PARAMETER  
SYMBOL  
TEST CONDITION  
CE# ≧ VCC - 0.2V  
or CE2 ≦ 0.2V  
MIN.  
TYP. MAX. UNIT  
VCC for Data Retention  
VDR  
2.0  
-
5.5  
V
VCC = 2.0V  
Data Retention Current  
IDR  
CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V  
Others at 0.2V or VCC-0.2V  
See Data Retention  
Waveforms (below)  
-
0.6  
3
mA  
Chip Disable to Data  
Retention Time  
Recovery Time  
tCDR  
tR  
0
-
-
-
-
ns  
ns  
tRC  
*
tRC = Read Cycle Time  
*
DATA RETENTION WAVEFORM  
Low Vcc Data Retention Waveform (1) (CE# controlled)  
VDR ≧ 2.0V  
Vcc(min.)  
Vcc  
Vcc(min.)  
tCDR  
tR  
VIH  
CE# ≧ Vcc-0.2V  
VIH  
CE#  
Low Vcc Data Retention Waveform (2) (CE2 controlled)  
VDR ≧ 2.0V  
Vcc(min.)  
Vcc  
Vcc(min.)  
tCDR  
tR  
CE2 ≦ 0.2V  
CE2  
VIL  
VIL  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
7
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
PACKAGE OUTLINE DIMENSION  
28 pin 300 mil PDIP Package Outline Dimension  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
8
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
28-pin 300 mil SOJ Package Outline Dimension  
28  
15  
1
14  
A2  
X
XX  
C
L
UNIT  
INCH(REF)  
MM(BASE)  
SYM.  
A
A1  
A2  
0.140 (MAX)  
0.026 (MIN)  
3.556 (MAX)  
0.660 (MIN)  
±
2.540 0.127  
±
0.100 0.005  
B
B1  
c
±
±
0.457 0.076  
0.018 0.003  
±
±
0.028 0.003 0.711 0.076  
±
±
0.254 0.076  
0.010 0.003  
D
E
±
±
18.03 0.254  
±
8.560 0.254  
0.710 0.010  
±
0.337 0.010  
E1  
e
±
±
7.620 0.127  
±
1.270 0.076  
0.300 0.005  
±
0.050 0.003  
L
±
±
2.210 0.254  
0.087 0.010  
S
±
±
0.030 0.004  
0.762 0.102  
Y
0.003 (MAX)  
0.076 (MAX)  
Note : 1.S/E/D dimension is not including mold flash.  
2.The end flash in package lengthwise is not more than 10 mils each side.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
9
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
28 pin 8x13.4mm STSOP Package Outline Dimension  
HD  
c
L
12° (2x)  
12° (2x)  
1
28  
14  
15  
"A"  
y
Seating Plane  
D
12° (2X)  
14  
15  
GAUGE PLANE  
0
SEATING PLANE  
12° (2X)  
L
1
28  
L1  
"A" DATAIL VIEW  
DIMENSIONS IN MILLIMETERS  
DIMENSIONS IN INCHES  
SYMBOLS  
MIN  
1.00  
0.05  
0.91  
0.17  
0.10  
13.20  
11.70  
7.90  
-
0.30  
0.675  
0.00  
0°  
NOM  
1.10  
-
MAX  
1.20  
0.15  
1.05  
0.27  
0.20  
13.60  
11.90  
8.10  
-
MIN  
NOM  
0.043  
-
MAX  
A
A1  
A2  
b
c
HD  
D
E
e
L
L1  
Y
0.040  
0.002  
0.036  
0.007  
0.004  
0.520  
0.461  
0.311  
-
0.012  
0.027  
0.000  
0°  
0.047  
0.006  
0.041  
0.011  
0.008  
0.535  
0.469  
0.319  
-
1.00  
0.22  
0.15  
13.40  
11.80  
8.00  
0.55  
0.50  
-
0.039  
0.009  
0.006  
0.528  
0.465  
0.315  
0.0216  
0.020  
-
0.70  
-
0.028  
-
-
3°  
0.076  
5°  
-
3°  
0.003  
5°  
Θ
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
10  
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
ORDERING INFORMATION  
LY6164 U V - WW Y Z  
Z : Packing Type  
Blank : Tube or Tray  
T : Tape Reel  
Y : Temperature Range  
Blank : (Commercial) 0°C ~ 70°C  
E : (Extended) -20°C ~ +80°C  
I : (Industrial) -40°C ~ +85°C  
WW : Access Time(Speed)  
V : Lead Information  
L : Green Package  
U : Package Type  
J : 28-pin 300 mil SOJ  
D : 28-pin 330 mil P-DIP  
R : 28-pin 8 mm x 13.4 mm STSOP  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
11  
®
LY6164  
8K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.2  
THIS PAGE IS LEFT BLANK INTENTIONALLY.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
12  
厂商 型号 描述 页数 下载

SEOUL

 		LY600Z 绿色椭圆LED灯[ GREEN OVAL LAMP LED ] 12 页

SEOUL

 		LY601 红外灯LED[ INFRARED LAMP LED ] 14 页

SEOUL

 		LY611 红外灯LED[ INFRARED LAMP LED ] 14 页

LYONTEK

 		LY611024 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

 		LY611024E 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

 		LY611024I 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

 		LY611024JL 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

 		LY611024JL-12I [ 暂无描述 ] 13 页

LYONTEK

 		LY611024JL-12LL 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

 		LY611024JL-12LLE 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

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