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IX4351NETR

型号:

IX4351NETR

品牌:

IXYS[ IXYS CORPORATION ]

页数:

10 页

PDF大小:

284 K

IX4351NE  
9A Low Side SiC  
MOSFET & IGBT Driver  
INTEGRATED  
C
IRCUITS  
D
IVISION  
Features  
Description  
Separate 9A peak source and sink outputs  
Operating Voltage Range: -10V to +25V  
Internal negative charge pump regulator for  
selectable negative gate drive bias  
Desaturation detection with soft shutdown sink driver  
TTL and CMOS compatible input  
Under Voltage lockout (UVLO)  
The IX4351NE is designed specifically to drive SiC  
MOSFETs and high power IGBTs. Separate 9A  
source and sink outputs allow for tailored turn-on and  
turn-off timing while minimizing switching losses. An  
internal negative charge regulator provides a  
selectable negative gate drive bias for improved dV/dt  
immunity and faster turn-off.  
Thermal shutdown  
Open drain FAULT output  
Desaturation detection circuitry detects an over  
current condition of the SiC MOSFET and initiates a  
soft turn off, thus preventing a potentially damaging  
dV/dt event. The logic input is TTL and CMOS  
compatible; this input does not need to be level shifted  
even with a negative gate drive bias voltage.  
Protection features include UVLO and thermal  
shutdown detection. An open drain FAULT output  
signals a fault condition to the microcontroller.  
Applications  
Driving SiC MOSFETs and IGBTs  
On-board charger and DC charging station  
Industrial inverters  
PFC, AC/DC and DC/DC converters  
IX4351 Functional Block Diagram  
The IX4351NE is rated for operational temperature  
range of -40°C to +125°C,and is available in a  
thermally enhanced 16-pin power SOIC package.  
VDD  
4
DESAT  
Ordering Information  
6
IN  
6.8V  
VDD  
VDD  
2
3
Part  
Description  
16-Pin power SOIC with exposed thermal pad.  
In tubes (50/Tube)  
Gate and  
Control  
Logic  
OUTSRC  
1
IX4351NE  
5
16  
FAULT  
OUTSNK  
16-Pin power SOIC with exposed thermal pad.  
In Tape & Reel (2000/Reel)  
VSS  
10 VSS  
15  
IX4351NETR  
14 OUTSOFT  
VDD  
VSS  
4.6V  
Regulator  
13  
INSOFT  
VREG  
8
2.6V  
VDD  
Charge  
Pump  
Control  
9
CAP  
SET  
12  
11 GND  
COM  
7
DS-IX4351NE-R01  
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1
IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.1 Package Pinout: 16-Pin SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.2 Pin Description: 16-Pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.3 Absolute Maximum Ratings (With respect to V  
unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
COM  
1.4 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.5 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.6 Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.1 Logic Input (IN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.2 Gate Drive Outputs (OUTSRC and OUTSNK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.3 4.6 Volt Regulator (VREG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.4 Negative V Charge Pump Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
SS  
2.5 Desaturation Detection and Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
2.6 Thermal Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
2.7 FAULT Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
3. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
2
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R01  
IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1 Specifications  
1.1 Package Pinout: 16-Pin SOIC Package  
IX4351  
OUTSRC  
VDD  
1
2
3
4
5
6
7
8
16  
OUTSNK  
15 VSS  
VDD  
14 OUTSOFT  
DESAT  
FAULT  
IN  
13  
12  
INSOFT  
CAP  
11 GND  
10  
COM  
VREG  
VSS  
9 SET  
1.2 Pin Description: 16-Pin SOIC Package  
Pin#  
Name  
Description  
1
2
OUTSRC  
Gate driver source output  
V
Positive supply voltage for gate driver outputs and logic circuitry  
Positive supply voltage for gate driver outputs and logic circuitry  
Sense input for the desaturation detection comparator  
Open-Drain Fault status output  
DD  
V
3
DD  
4
DESAT  
FAULT  
IN  
5
6
Logic input  
7
COM  
VREG  
SET  
Common ground connection  
8
4.6V regulator output  
9
Negative bias voltage set input  
V
10  
11  
12  
13  
14  
15  
16  
Negative drive voltage supply  
SS  
GND  
CAP  
Charge pump ground connection  
Flying charge pump capacitor connection  
Soft shutdown comparator input  
Soft shutdown sink driver output  
Negative drive voltage supply  
INSOFT  
OUTSOFT  
V
SS  
OUTSNK  
Gate driver sink output  
R01  
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3
IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1.3 Absolute Maximum Ratings (With respect to V  
unless otherwise specified)  
COM  
Parameter  
Symbol  
VDD  
Minimum  
Maximum  
Units  
Positive Supply Voltage  
Negative Supply Voltage  
Supply Voltage Range  
Gate Drive Output Voltages  
Gate Drive Output Current  
Logic Input Voltage  
-0.3  
-10  
32  
V
V
V
VSS  
0
40  
VDD - VSS  
-0.3  
VOUTSRC , VOUTSNK , VOUTSOFT  
VSS - 0.3  
VDD + 0.3  
V
A
V
IOUTSRC , IOUTSNK  
-
9
7
VIN  
-0.3  
VDESAT  
DESAT Input Voltage  
V
DD + 0.3  
-0.3  
V
V
VSET  
SET Input Voltage  
VCOM - 1  
VCOM + 7  
VDD + 0.3  
VFAULT  
VREG  
TJ  
FAULT Output Voltage  
VREG Output Voltage  
Junction Temperature  
Storage Temperature  
-0.3  
-0.3  
-55  
-55  
V
V
7
+150  
+150  
°C  
°C  
TSTG  
1.4 Recommended Operating Conditions  
Parameter  
Positive Supply Voltage  
Symbol  
Minimum  
Maximum  
Units  
V
V
V
13  
-10  
0
25  
0
DD  
V
Negative Supply Voltage  
Input Voltage  
SS  
V
V
5.5  
125  
IN  
T
Operating Ambient Temperature  
-40  
°C  
A
1.5 Electrical Characteristics  
(V =20V, V =-5V, COM=GND=0V, C =C  
=4.7F, C =10F, T =-40°C to +125°C, unless otherwise  
DD  
SS  
DD  
REG  
SS  
A
specified.)  
1.5.1 V Section  
DD  
Parameter  
Conditions  
Symbol Minimum Typical Maximum Units  
Operating VDD Supply Current  
Quiescent VDD Supply Current  
VDD UVLO Rising Threshold  
fIN=100kHz, CLOAD=2.2nF  
mA  
IDD  
-
-
19  
2.9  
12  
2
28  
4.4  
13  
-
No load  
IDDQ  
mA  
V
-
-
VDDUV+  
VDDHYS  
10  
-
VDD UVLO Hysteresis  
V
1.5.2 V Section  
REG  
Parameter  
Conditions  
IVREG=-5mA  
Symbol Minimum Typical Maximum Units  
Regulator Output Voltage  
Line Regulation  
V
VVREG  
4.2  
4.6  
0.1  
0.1  
5
15V < VDD < 25V, IVREG=-5mA  
IREG=-1mA to -10mA  
-
-
0.2  
0.4  
V
V
VREG  
Load Regulation  
4
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R01  
IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1.5.3 Charge Pump Section  
Parameter  
Conditions  
Symbol Minimum Typical Maximum Units  
Negative Bias Rail Voltage Range  
Maximum VSS Current  
-
V
VSS  
ISS  
-VDD  
-8  
-
-3.5  
50  
CFLY=66nF, RFLY=33  
-
mA  
Charge Pump Frequency  
-
fOSC  
90  
124  
160  
kHz  
1.5.4 Desaturation Section  
Parameter  
DESAT Source Current  
DESAT Threshold Voltage  
Blanking Time  
Conditions  
Symbol Minimum Typical Maximum Units  
VDESAT=0V  
A  
IDESAT  
VTH,DESAT  
tBLANK  
400  
570  
6.8  
750  
-
-
-
6
-
8
-
V
250  
900  
ns  
DESAT Pull Down Resistance  
RDESAT  
-
-
1.5.5 Thermal Shutdown Section  
Parameter  
Thermal Shutdown Temperature  
Thermal Shutdown Hysteresis  
Conditions  
Symbol Minimum Typical Maximum Units  
-
-
TSD  
-
-
160  
20  
-
-
°C  
°C  
TSDHYS  
1.5.6 Logic Input Section  
Parameter  
High Level Input Voltage  
Low Level Input Voltage  
Input Hysteresis  
Conditions  
Symbol Minimum Typical Maximum Units  
-
V
VINH  
VINL  
VINHYS  
IINH  
2.2  
-
-
-
1
-
-
0.2  
-
V
-
0.4  
-
-
V
VIN=5v  
VIN=0V  
High Level Input Current  
Low Level Input Current  
Input Pull-Down Resistance  
70  
-10  
-
A  
A  
k  
IINL  
-
-
-
RIN  
-
100  
1.5.7 FAULT Section  
Parameter  
Output Low Voltage  
Conditions  
Symbol Minimum Typical Maximum Units  
IFAULT=20mA  
V
VFAULTL  
IFAULT  
-
-
-
-
0.8  
10  
-
VFAULT=25V  
Output Leakage Current  
0.1  
150  
A  
DESAT Detect to FAULT Delay  
-
tFAULTDLY  
ns  
R01  
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IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1.5.8 Soft Shutdown Section  
Parameter  
Conditions  
Symbol Minimum Typical Maximum Units  
Soft Shutdown Threshold Voltage  
Soft Shutdown Hysteresis  
-
V
VTH,INSOFT  
VINSOFTHYS  
IOUTSOFT  
2.3  
2.6  
0.4  
900  
7
3
-
-
-
-
-
-
V
mA  
OUTSOFT Peak Sink Current  
OUTSOFT On Resistance  
-
-
IOUTSOFT=100mA  
ROUTSOFT  
tOUTSOFTDLY  
15  
-
DESAT Detect to OUTSOFT Delay  
-
125  
ns  
1.5.9 Gate Driver Section  
Parameter  
High Level Output Voltage  
Low Level Output Voltage  
OUTSRC ON-Resistance  
OUTSNK ON-Resistance  
Turn-On Propagation Delay Time  
Turn-Off Propagation Delay Time  
Turn-On Rise Time  
Conditions  
IOUTSRC=-100mA  
IOUTSNK=100mA  
IOUTSRC=-100mA  
IOUTSNK=100mA  
CLOAD=10nF  
Symbol Minimum Typical Maximum Units  
V
VOUTSRC  
VOUTSNK  
ROUTSRC  
ROUTSNK  
tON  
VDD- 0.25  
-
-
-
-
-
-
-
-
-
-
0.25  
2
V
0.8  
0.7  
70  
65  
10  
10  
ns  
ns  
ns  
ns  
1.5  
125  
125  
20  
CLOAD=10nF  
tOFF  
CLOAD=1nF  
tR  
CLOAD=1nF  
Turn-Off Fall Time  
tF  
20  
1.6 Thermal Characteristics  
Parameter  
Symbol  
Rating  
Units  
Thermal Impedance, Junction to Ambient  
Thermal Impedance, Junction to Case  
JA  
JC  
60  
°C/W  
°C/W  
28  
6
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R01  
IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
2 Functional Description  
The IX4351NE is designed to provide the gate drive  
for high power SiC MOSFETs and IGBTs.  
Figure 1. IX4351NE Typical Application Circuit  
VDD  
RDESAT D1  
CBLANK  
DRAIN  
DESAT  
IN  
4
6
6.8V  
VDD  
2
3
+22V  
RH  
CDD  
Controller  
OUTSRC  
Gate and  
Control  
Logic  
1
FAULT  
OUTSNK  
16  
5
RL  
VSS  
GATE  
15  
10  
RSOFT  
OUTSOFT  
14  
SOURCE  
VDD  
VSS  
INSOFT  
VREG  
4.6V  
Regulator  
13  
8
2.6V  
VDD  
R1  
R2  
CFLY  
Charge  
Pump  
Control  
SET  
CAP  
RFLY  
CREG  
9
12  
CSS  
GND  
11  
7
COM  
VSS  
2.1 Logic Input (IN)  
2.2 Gate Drive Outputs (OUTSRC and OUTSNK)  
The logic input IN controls the state of the high current  
source driver output (OUTSRC), high current sink  
driver output (OUTSNK), and a lower current sink  
driver output (OUTSOFT). The IN input is a  
high-speed Schmitt trigger buffer with 0.4V hysteresis.  
The IN logic thresholds are TTL and CMOS  
The IX4351NE power outputs are rated for 9A peak  
current capability. Separate source and sink outputs  
allow independent adjustment of the discrete SiC  
MOSFET or IGBT turn-on and turn-off transactions  
with a single resistor. An internal dead time prevents  
the cross conduction of the source and sink outputs.  
compatible, and are referenced to COM. When V is  
DD  
2.3 4.6 Volt Regulator (VREG)  
greater than the V UVLO rising threshold (V  
DD  
DDUV+  
typically 12V) IN controls the state of the gate driver  
outputs according to Table 1:  
The internal 4.6V regulator provides power for the low  
voltage control circuitry. An external 4.7F bypass  
capacitor (C  
) is required. VREG can source up to  
REG  
2.1.1 Table 1  
10mA, and can be used to set the negative bias  
voltage and power an external logic optocoupler.  
V
IN  
OUTSRC  
OUTSNK OUTSOFT  
DD  
X
0
1
< VDDUV+  
> VDDUV+  
> VDDUV+  
Off  
Off  
Low  
Low  
Off  
Low  
Low  
Off  
High  
R01  
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IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
2.4 Negative V Charge Pump Regulator  
the GATE voltage decreases to the Soft Shutdown  
Threshold Voltage (V typically 2.6V)  
SS  
TH,INSOFT  
The IX4351NE has an inverting charge pump  
regulator that produces a negative regulated V  
OUTSNK turns on and quickly pulls the GATE to V  
.
SS  
SS  
This two-step turn-off avoids dangerous dV/dt  
over-voltages across the external SiC MOSFET or  
IGBT.  
output. The charge pump operates in a closed-loop  
mode creating V from V . The charge pump output  
SS  
DD  
regulation is achieved by sensing the V voltage  
SS  
through resistor divider R1 and R2. The charge pump  
The DESAT comparator is disabled for a fixed blanking  
time (t ) to avoid detecting a false desaturation  
requires an external flying capacitor (C ), two  
FLY  
BLANK  
discrete Schottky diodes, a storage capacitor (C ),  
event during the external SiC MOSFET or IGBT  
turn-on. The nominal t is 250ns, which can be  
SS  
and a peak current limiting resistor (R ). V is set  
FLY  
SS  
BLANK  
by the R1 and R2 resistor divider:  
increased by adjusting R  
and C  
. This  
DESAT  
BLANK  
blanking time starts when IN transitions from low to  
high.  
R2  
R1  
------  
VSS = –VREG  
2.6 Thermal Shutdown  
2.5 Desaturation Detection and Protection  
Thermal protection circuity turns off OUTSRC and  
turns on OUTSNK and OUTSOFT when the junction  
temperature reaches +160°C. OUTSRC is re-enabled  
when the junction temperature cools to +140°C.  
The desaturation protection circuit ensures the  
protection of the external SiC MOSFET or IGBT in the  
event of an over-current situation. The DESAT pin  
monitors the drain voltage of the power SiC MOSFET  
or the collector of the power IGBT via R  
and D1.  
DESAT  
2.7 FAULT Output  
If the drain or collector voltage exceed the DESAT  
Threshold Voltage (V typically 6.8V) a  
The FAULT output signals if the IX4351NE is  
undergoing a fault condition. The open-drain NMOS is  
TH,DESAT  
controlled turn-off sequence is initiated. OUTSRC is  
turned off and OUTSOFT is turned on. The 900mA  
sink capability of OUTSOFT allows an initial slow  
turn-off of the external SiC MOSFET or IGBT. When  
pulled low when V < V  
, T =TSD, or a  
DD  
DDUV+  
J
desaturation is detected. FAULT is turned off when the  
fault condition is remedied.  
Figure 2. Timing Diagram  
IN  
GND  
VDD  
Hi-Z  
OUTSRC  
Hi-Z  
VSS  
OUTSNK  
Hi-Z  
VTH,INSOFT  
OUTSOFT  
VSS  
VTH,DESAT  
DESAT  
FAULT  
Hi-Z  
GND  
tON  
tOFF  
tBLANK  
tOUTSOFTDLY  
8
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IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
3 Manufacturing Information  
3.1 Moisture Sensitivity  
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated  
Circuits classifies its plastic encapsulated devices for moisture sensitivity according to the latest version of  
the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of  
our products to the maximum conditions set forth in the standard, and guarantee proper operation of our  
devices when handled according to the limitations and information in that standard as well as to any limitations set  
forth in the information or standards referenced below.  
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced  
product performance, reduction of operable life, and/or reduction of overall reliability.  
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled  
according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.  
Device  
Moisture Sensitivity Level (MSL) Classification  
IX4351NE  
MSL 1  
3.2 ESD Sensitivity  
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.  
3.3 Soldering Profile  
Provided in the table below is the IPC/JEDEC J-STD-020 Classification Temperature (T ) and the maximum dwell  
C
time the body temperature of these surface mount devices may be (T - 5)°C or greater. The Classification  
C
Temperature sets the Maximum Body Temperature allowed for these devices during reflow soldering processes.  
Classification Temperature (TC)  
Dwell Time (tp)  
Device  
Max Reflow Cycles  
IX4351NE  
260°C  
30 seconds  
3
3.4 Board Wash  
IXYS Integrated Circuits recommends the use of no-clean flux formulations. Board washing to reduce or remove flux  
residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage to  
the device. These precautions include but are not limited to: using a low pressure wash and providing a follow up bake  
cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the variability of  
the wash parameters used to clean the board, determination of the bake temperature and duration necessary to  
remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning or drying  
methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the device must  
not be exposed to halide flux or solvents.  
R01  
www.ixysic.com  
9
IX4351NE  
INTEGRATED  
C
IRCUITS  
D
IVISION  
3.5 Mechanical Dimensions  
3.5.1 IX4351NE 16-Pin SOIC Package  
9.90 BSC  
(0.390 BSC)  
See Note 3  
Recommended PCB Pattern  
4.55  
2.40  
(0.094)  
(0.179)  
3.90 BSC  
(0.154 BSC)  
See Note 4  
6.00 ± 0.50 BSC  
(0.236 ± 0.020 BSC)  
5.50  
(0.217)  
0.20 TYP  
(0.008 TYP)  
0.31 - 0.51  
(0.012 - 0.020)  
0.60  
(0.024)  
1.25 min  
(0.049 min)  
1.27  
(0.05)  
1.70  
(0.059)  
0º - 8º  
1.27 TYP  
(0.05 TYP)  
1.70 max  
(0.067 max)  
0.80 ± 0.50  
(0.031 ± 0.020)  
0.00 - 0.15  
(0.000 - 0.006)  
DIMENSIONS  
mm  
(inches)  
3.86 - 4.57  
(0.152 - 0.180)  
1.68 - 2.41  
(0.066 - 0.095)  
NOTES:  
1. All dimensions are MM (IN)  
2. Reference JEDEC outline: MS-012 BC Rev F. (Thermal)  
3. Dimension does not include mold flash, protrusions,  
or gate burrs. Mold flash, protrusions, and gate burrs  
shall not exceed 0.15 (0.006) per side.  
4. Dimension does not include inter-lead flash, and  
protrusions shall not exceed 0.25 (0.010) per side.  
3.5.2 IX4351NETR Tape & Reel Packaging for 16-Pin SOIC Package  
P1=8.00 ± 0.10  
(0.315 ± 0.004)  
0.30 ± 0.05  
(0.012 ± 0.002)  
2.00 ± 0.10 Note 3  
1.75 ± 0.10  
(0.069 ± 0.004)  
330.2 DIA.  
(13.00 DIA.)  
(0.079 ± 0.004)  
4.00 Note 1  
(0.157)  
1.5 +0.1 / -0.0  
A
R 0.3 max  
Top Cover  
Tape Thickness  
0.102 MAX.  
(0.004 MAX.)  
B0=10.30 ± 0.10  
(0.406 ± 0.004)  
A
1.50 min  
A0=6.50 ± 0.10  
(0.256 ± 0.004)  
7.5 ± 0.10 Note 3  
(0.295 ± 0.004)  
16.0 ± 0.3  
R 0.5 typ  
K0=2.10 ± 0.1  
(0.083 ± 0.004)  
Direction of feed  
Embossed Carrier  
(0.63 ± 0.012)  
NOTES:  
Section A-A  
1.10 Sprocket hole pitch cumulative tolerance ±0.2  
2. Camber in compliance with EIA 481  
3. Pocket position relative to sprocket hole measured  
as true position of pocket, not pocket hole  
Dimensions  
Embossment  
mm  
(inches)  
For additional information please visit our website at: www.ixysic.com  
Disclaimer Notice - Littelfuse products are not designed for, and shall not be used for, any purpose (including, without limitation, automotive, military, aerospace, medical, life-saving,  
life-sustaining or nuclear facility applications, Components intended for surgical implant into the body, or any other application in which the failure or lack of desired operation of the product may  
result in personal injury, death, or property damage) other than those expressly set forth in applicable Littelfuse product documentation. Warranties granted by Littelfuse shall be deemed void  
for products used for any purpose not expressly set forth in applicable Littelfuse documentation. Littelfuse shall not be liable for any claims or damages arising out of products used in  
applications not expressly intended by Littelfuse as set forth in applicable Littelfuse documentation. The sale and use of Littelfuse products is subject to Littelfuse Terms and Conditions of Sale,  
unless otherwise agreed by Littelfuse. Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product  
selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications.  
Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics.  
Specification: DS-IX4351NE-R01  
©Copyright 2019, Littelfuse, Inc.  
All rights reserved. Printed in USA.  
10/31/2019  
10  
www.ixysic.com  
R01  
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