®
LY61L2568A
256K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
MIN.
-
-
MAX
8
10
UNIT
pF
pF
CIN
CI/O
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Speed
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
8/10/12ns
0.2V to VCC - 0.2V
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
LY61L2568A-8 LY61L2568A-10 LY61L2568A-12
PARAMETER
Read Cycle Time
SYM.
tRC
UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
8
-
-
-
8
8
4.5
-
10
-
-
-
10
10
4.5
-
-
4
4
-
12
-
-
-
12
12
5
-
-
5
5
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
tAA
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z tOLZ
Chip Disable to Output in High-Z tCHZ
tACE
tOE
tCLZ
-
-
-
*
*
*
*
2
0
-
-
2
2
0
-
-
2
3
0
-
-
2
-
3
3
-
Output Disable to Output in High-Z tOHZ
Output Hold from Address Change tOH
(2) WRITE CYCLE
LY61L2568A-8 LY61L2568A-10 LY61L2568A-12
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time tDH
SYM.
tWC
tAW
tCW
tAS
tWP
tWR
tDW
UNIT
MIN.
8
6.5
6.5
0
MAX.
MIN.
10
8
8
0
MAX.
MIN.
12
10
10
0
MAX.
-
-
-
-
-
-
-
-
-
-
-
-
4
-
-
-
-
-
-
-
-
-
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
6.5
0
-
-
8
0
10
0
5
-
6
7
0
-
0
0
Output Active from End of Write
Write to Output in High-Z
tOW
*
2
-
2
2
tWHZ
*
-
3
-
-
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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