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LY61L51216AGL-10T

型号:

LY61L51216AGL-10T

品牌:

LYONTEK[ Lyontek Inc. ]

页数:

12 页

PDF大小:

300 K

®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
REVISION HISTORY  
Revision  
Rev. 1.0  
Rev. 1.1  
Description  
Initial Issued  
Issue Date  
2012/2/22  
July.19. 2012  
“CE# VCC - 0.2V” revised as ”CE# 0.2” for TEST  
CONDITION of Average Operating Power supply Current  
Icc1 on page3  
2.Revised ORDERING INFORMATION Page13  
1.Revise “TEST CONDITION” for VOH, VOL on page 4  
Rev. 1.2  
Rev. 1.3  
June. 04. 2013  
IOH = -8mA revised as -4mA  
IOL =4mA revised as 8mA  
2.Revise VIH(max) & VIL(min) note on page 4  
VIH(max) = VCC + 2.0V for pulse width less than 6ns.  
VIL(min) = VSS - 2.0V for pulse width less than 6ns.  
Revised the address pin sequence of TSOP-II pin configuration on  
page 2 in order to be compatible with industry convention. (No  
function specifications and applications have been changed and all  
the characteristics are kept all the same as Rev 1.2 )  
Oct. 30. 2013  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
0
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
GENERAL DESCRIPTION  
Rev. 1.3  
FEATURES  
„ Fast access time : 8/10/12ns  
„ low power consumption:  
Operating current:  
The LY61L51216A is a 8M-bit high speed CMOS  
static random access memory organized as 512K  
words by 16 bits. It is fabricated using very high  
performance, high reliability CMOS technology. Its  
standby current is stable within the range of  
operating temperature.  
90/80/70mA (TYP. 8/10/12ns)  
Standby current:  
3mA(TYP)  
„ Single 3.3V power supply  
„ All inputs and outputs TTL compatible  
„ Fully static operation  
„ Tri-state output  
„ Data byte control : LB# (DQ0 ~ DQ7)  
UB# (DQ8 ~ DQ15)  
The LY61L51216A operates from a single power  
supply of 3.3V and all inputs and outputs are fully  
TTL compatible  
„ Data retention voltage : 1.5V (MIN.)  
„ Green package available  
„ Package : 44-pin 400 mil TSOP-II  
48-ball 6mmx8mm TFBGA  
PRODUCT FAMILY  
Power Dissipation  
Speed  
Product  
Family  
LY61L51216A  
LY61L51216A(I)  
LY61L51216A  
LY61L51216A(I)  
Operating  
Temperature  
0 ~ 70  
-40 ~ 85℃  
0 ~ 70℃  
Vcc Range  
Standby(ISB1,TYP.) Operating(Icc1,TYP.)  
3.0 ~ 3.6V  
3.0 ~ 3.6V  
2.7 ~ 3.6V  
2.7 ~ 3.6V  
8/10/12ns  
8/10/12ns  
10/12ns  
3mA  
3mA  
3mA  
3mA  
90/80/70mA  
90/80/70mA  
80/70mA  
-40 ~ 85℃  
10/12ns  
80/70mA  
FUNCTIONAL BLOCK DIAGRAM  
PIN DESCRIPTION  
SYMBOL  
DESCRIPTION  
Address Inputs  
A0 - A18  
DQ0 – DQ15 Data Inputs/Outputs  
CE#  
WE#  
OE#  
LB#  
UB#  
VCC  
Chip Enable Input  
Write Enable Input  
Output Enable Input  
Lower Byte Control  
Upper Byte Control  
Power Supply  
VSS  
Ground  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
1
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
PIN CONFIGURATION  
LB# OE# A0  
DQ8 UB# A3  
DQ9 DQ10 A5  
A1  
A2 NC  
A
B
C
D
E
F
A4 CE# DQ0  
A6 DQ1 DQ2  
Vss DQ11 A17 A7 DQ3 Vcc  
Vcc DQ12 NC A16 DQ4 Vss  
DQ14 DQ13 A14 A15 DQ5 DQ6  
DQ15 NC A12 A13 WE# DQ7  
G
H
A18 A8  
A9 A10 A11 NC  
1
2
3
4
5
6
TFBGA  
ABSOLUTE MAXIMUN RATINGS*  
PARAMETER  
Terminal Voltage with Respect to VSS  
SYMBOL  
VTERM  
RATING  
-0.5 to 4.6  
0 to 70(C grade)  
-40 to 85(I grade)  
-65 to 150  
1
UNIT  
V
Operating Temperature  
TA  
Storage Temperature  
Power Dissipation  
TSTG  
PD  
W
DC Output Current  
Soldering Temperature (under 10 sec)  
IOUT  
50  
260  
mA  
TSOLDER  
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating  
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not  
implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
2
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
TRUTH TABLE  
I/O OPERATION  
MODE  
CE# OE# WE# LB# UB#  
SUPPLY CURRENT  
DQ0-DQ7  
DQ8-DQ15  
Standby  
H
X
X
X
X
High – Z  
High – Z  
ISB1  
ICC  
L
L
H
X
H
X
X
H
X
H
High – Z  
High – Z  
High – Z  
High – Z  
Output Disable  
L
L
L
L
L
L
L
L
L
X
X
X
H
H
H
L
L
L
L
H
L
L
H
L
H
L
L
H
L
L
DOUT  
High – Z  
DOUT  
DIN  
High – Z  
DIN  
High – Z  
DOUT  
DOUT  
High – Z  
DIN  
Read  
Write  
ICC  
ICC  
DIN  
Note: H = VIH, L = VIL, X = Don't care.  
DC ELECTRICAL CHARACTERISTICS  
SYMBOL  
TEST CONDITION  
MIN. TYP. *4  
MAX.  
3.6  
3.6  
VCC+0.3  
0.8  
UNIT  
PARAMETER  
-8  
-10/12  
3.0  
2.7  
2.2  
3.3  
3.3  
-
V
V
V
V
Supply Voltage  
VCC  
*1  
Input High Voltage  
Input Low Voltage  
Input Leakage  
Current  
VIH  
VIL  
*2  
- 0.3  
-
ILI  
V
CC VIN VSS  
CC VOUT VSS, Output Disabled  
- 1  
- 1  
-
-
1
1
A
µ
Output Leakage  
Current  
ILO  
V
A
µ
Output High Voltage  
VOH  
VOL  
IOH = -4mA  
IOL =8mA  
2.4  
-
-
-
-
V
Output Low Voltage  
0.4  
V
-8  
110  
100  
90  
140  
130  
120  
120  
110  
100  
-
-
-
-
-
-
mA  
mA  
mA  
mA  
mA  
mA  
CE# = VIL , II/O = 0mA  
;f=max  
Icc  
-10  
-12  
-8  
Average Operating  
Power supply Current  
90  
CE# 0.2, Other pin is at  
0.2V or Vcc-0.2V  
-10  
Icc1  
80  
II/O = 0mA;f=max  
-12  
70  
Standby Power  
Supply Current  
Standby Power  
Supply Current  
Isb  
CE# Vih ,Other pin is at Vil or Vih  
-
-
-
40  
25  
mA  
mA  
CE# VCC - 0.2V;  
Other pin is at 0.2V or Vcc-0.2V  
ISB1  
3
Notes:  
1. VIH(max) = VCC + 2.0V for pulse width less than 6ns.  
2. VIL(min) = VSS - 2.0V for pulse width less than 6ns.  
3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test.  
4. Typical values are included for reference only and are not guaranteed or tested.  
Typical valued are measured at VCC = VCC(TYP.) and TA = 25  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
3
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
CAPACITANCE (TA = 25, f = 1.0MHz)  
PARAMETER  
Input Capacitance  
Input/Output Capacitance  
SYMBOL  
MIN.  
-
-
MAX  
8
10  
UNIT  
pF  
pF  
CIN  
CI/O  
Note : These parameters are guaranteed by device characterization, but not production tested.  
AC TEST CONDITIONS  
speed  
8ns/10/12ns  
0.2V to Vcc-0.2V  
3ns  
Input Pulse Levels  
Input Rise and Fall Times  
Input and Output Timing Reference Levels 1.5V  
CL = 30pF + 1TTL,  
IOH/IOL = -4mA/8mA  
Output Load  
AC ELECTRICAL CHARACTERISTICS  
(1) READ CYCLE  
LY61L51216A-8 LY61L51216A-10 LY61L51216A-12  
MIN. MAX. MIN. MAX. MIN. MAX.  
PARAMETER  
SYM.  
UNIT  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low-Z  
Output Enable to Output in Low-Z  
Chip Disable to Output in High-Z  
Output Disable to Output in High-Z  
Output Hold from Address Change  
LB#, UB# Access Time  
tRC  
tAA  
8
-
-
-
8
8
4.5  
-
-
3
3
-
10  
-
-
-
10  
10  
4.5  
-
-
4
4
-
12  
-
-
-
12  
12  
5
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tACE  
tOE  
tCLZ  
tOLZ  
tCHZ  
tOHZ  
tOH  
tBA  
-
-
-
*
*
*
*
2
0
-
-
2
-
2
0
-
-
2
-
3
0
-
-
2
-
-
5
5
-
5
5
-
4.5  
3
-
4.5  
4
-
LB#, UB# to High-Z Output  
LB#, UB# to Low-Z Output  
tBHZ  
tBLZ  
*
*
-
0
-
0
-
0
(2) WRITE CYCLE  
PARAMETER  
LY61L51216A-8 LY61L51216A-10 LY61L51216A-12  
MIN. MAX. MIN. MAX. MIN. MAX.  
SYM.  
UNIT  
Write Cycle Time  
tWC  
tAW  
tCW  
tAS  
tWP  
tWR  
tDW  
tDH  
8
6.5  
6.5  
0
6.5  
0
5
0
2
-
-
-
-
-
-
-
-
-
-
3
-
10  
8
8
0
8
0
6
0
2
-
-
-
-
-
-
-
-
-
-
4
-
12  
10  
10  
0
10  
0
7
0
2
-
-
-
-
-
-
-
-
-
-
5
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write Time  
Output Active from End of Write  
Write to Output in High-Z  
LB#, UB# Valid to End of Write  
tOW  
tWHZ  
tBW  
*
*
6.5  
8
10  
*These parameters are guaranteed by device characterization, but not production tested.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
4
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
TIMING WAVEFORMS  
READ CYCLE 1 (Address Controlled) (1,2)  
tRC  
Address  
Dout  
tAA  
tOH  
Previous Data Valid  
Data Valid  
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)  
tRC  
Address  
tAA  
CE#  
tACE  
LB#,UB#  
tBA  
OE#  
tOE  
tOH  
tOLZ  
tBLZ  
tCLZ  
tOHZ  
tBHZ  
tCHZ  
High-Z  
Dout  
High-Z  
Data Valid  
Notes :  
1.WE#is high for read cycle.  
2.Device is continuously selected OE# = low, CE# = low, LB# or UB# = low.  
3.Address must be valid prior to or coincident with CE# = low, LB# or UB# = low transition; otherwise tAA is the limiting parameter.  
4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
5
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)  
tWC  
Address  
tAW  
CE#  
tCW  
tBW  
LB#,UB#  
WE#  
tAS  
tWP  
tWR  
tWHZ  
TOW  
High-Z  
Dout  
(4)  
(4)  
tDW  
tDH  
Din  
Data Valid  
WRITE CYCLE 2 (CE# Controlled) (1,2,5,6)  
tWC  
Address  
tAW  
CE#  
tAS  
tWR  
tCW  
tBW  
LB#,UB#  
tWP  
WE#  
Dout  
Din  
tWHZ  
High-Z  
(4)  
tDW  
tDH  
Data Valid  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
6
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
WRITE CYCLE 3 (LB#,UB# Controlled)  
(1,2,5,6)  
tWC  
Address  
tAW  
tWR  
CE#  
tAS  
tCW  
tBW  
LB#,UB#  
tWP  
WE#  
tWHZ  
High-Z  
Dout  
(4)  
tDW  
tDH  
Din  
Data Valid  
Notes :  
1.WE#,CE#, LB#, UB# must be high during all address transitions.  
2.A write occurs during the overlap of a low CE#, low WE#, LB# or UB# = low.  
3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed  
on the bus.  
4.During this period, I/O pins are in the output state, and input signals must not be applied.  
5.If the CE#, LB#, UB# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state.  
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
DATA RETENTION CHARACTERISTICS  
PARAMETER  
SYMBOL  
TEST CONDITION  
MIN.  
TYP.  
MAX.  
UNIT  
VCC for Data Retention  
VDR CE# VCC - 0.2V  
CC = 1.5V  
1.5  
-
3.6  
V
V
CE# VCC - 0.2V;  
Other pin is at 0.2V or  
Vcc-0.2V  
-
-
Data Retention Current  
IDR  
3
25  
mA  
Chip Disable to Data  
Retention Time  
Recovery Time  
See Data Retention  
Waveforms (below)  
tCDR  
tR  
0
-
-
-
-
ns  
ns  
tRC  
*
tRC = Read Cycle Time  
*
DATA RETENTION WAVEFORM  
VDR 1.5V  
Vcc(min.)  
Vcc  
Vcc(min.)  
tCDR  
tR  
VIH  
CE# Vcc-0.2V  
VIH  
CE#  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
7
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
PACKAGE OUTLINE DIMENSION  
44-pin 400mil TSOP-  
Package Outline Dimension  
DIMENSIONS IN MILLMETERS  
DIMENSIONS IN MILS  
SYMBOLS  
MIN.  
-
NOM.  
-
MAX.  
1.20  
0.15  
1.05  
0.45  
0.21  
18.618  
12.014  
10.363  
-
MIN.  
NOM.  
-
MAX.  
A
A1  
A2  
b
-
47.2  
5.9  
41.3  
17.7  
8.3  
733  
473  
408  
-
0.05  
0.95  
0.30  
0.12  
18.212  
11.506  
9.957  
-
0.10  
1.00  
-
2.0  
37.4  
11.8  
4.7  
717  
453  
392  
-
3.9  
39.4  
-
c
-
-
D
18.415  
11.760  
10.160  
0.800  
0.50  
0.805  
-
725  
463  
400  
31.5  
19.7  
31.7  
-
E
E1  
e
L
0.40  
-
0.60  
-
15.7  
-
23.6  
-
ZD  
y
-
0.076  
6o  
-
3
0o  
3o  
0o  
3o  
6o  
Θ
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
8
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
48-ball 6mm × 8mm TFBGA Package Outline Dimension  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
9
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
ORDERING INFORMATION  
Package Type  
44Pin(400mil)  
Access Time  
(Speed)(ns)  
Temperature  
Packing  
Type  
Lyontek Item No.  
Range()  
8
Tray  
LY61L51216AML-8  
LY61L51216AML-8T  
LY61L51216AML-8I  
LY61L51216AML-8IT  
LY61L51216AML-10  
LY61L51216AML-10T  
LY61L51216AML-10I  
~70  
0
TSOP-II  
Tape Reel  
Tray  
-40 ~85  
Tape Reel  
Tray  
10  
~70  
0
Tape Reel  
Tray  
-40 ~85  
Tape Reel  
Tray  
LY61L51216AML-10IT  
LY61L51216AML-12  
LY61L51216AML-12T  
LY61L51216AML-12I  
LY61L51216AML-12IT  
LY61L51216AGL-8  
12  
~70  
0
Tape Reel  
Tray  
-40 ~85  
Tape Reel  
Tray  
48-ball(6mmx8mm)  
TFBGA  
8
~70  
0
Tape Reel  
Tray  
LY61L51216AGL-8T  
LY61L51216AGL-8I  
LY61L51216AGL-8IT  
LY61L51216AGL-10  
LY61L51216AGL-10T  
LY61L51216AGL-10I  
LY61L51216AGL-10IT  
LY61L51216AGL-12  
LY61L51216AGL-12T  
LY61L51216AGL-12I  
LY61L51216AGL-12IT  
-40 ~85  
Tape Reel  
Tray  
10  
12  
~70  
0
Tape Reel  
Tray  
-40 ~85  
Tape Reel  
Tray  
~70  
0
Tape Reel  
Tray  
-40 ~85  
Tape Reel  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
10  
®
LY61L51216A  
512K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 1.3  
THIS PAGE IS LEFT BLANK INTENTIONALLY.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
11  
厂商 型号 描述 页数 下载

SEOUL

LY600Z 绿色椭圆LED灯[ GREEN OVAL LAMP LED ] 12 页

SEOUL

LY601 红外灯LED[ INFRARED LAMP LED ] 14 页

SEOUL

LY611 红外灯LED[ INFRARED LAMP LED ] 14 页

LYONTEK

LY611024 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

LY611024E 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

LY611024I 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

LY611024JL 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

LY611024JL-12I [ 暂无描述 ] 13 页

LYONTEK

LY611024JL-12LL 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

LYONTEK

LY611024JL-12LLE 128K ×8位高速CMOS SRAM[ 128K X 8 BIT HIGH SPEED CMOS SRAM ] 13 页

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