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LY62L1024GL-45SLI

型号：

LY62L1024GL-45SLI

品牌：

LYONTEK[ Lyontek Inc. ]

页数：

18 页

PDF大小：

812 K

下载PDF手册
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
REVISION HISTORY  
Revision  
Rev. 1.0  
Rev. 1.1  
Rev. 1.2  
Description  
Initial Issue  
Revised Icc  
Deleted L grade  
Added SL grade  
Issue Date  
Jul.25.2004  
Aug.13.2004  
Mar.30.2009  
℃
℃
Added ISB1/IDR values when TA = 25 and TA = 40  
FEATURES ORDERING INFORMATION  
Lead free  
Revised  
&
and green package available to Green package available  
ORDERING INFORMATION  
Added packing type in  
Revised VTERM to VT1 and VT2  
ABSOLUTE MAXIMUN RATINGS  
Deleted TSOLDER in  
Rev. 1.3  
Rev. 1.4  
Rev. 1.5  
Rev. 1.6  
Rev. 1.7  
Dec.18.2009  
May.7.2010  
Aug.25.2010  
Dec.10.2010  
Feb.26.2015  
PACKAGE OUTLINE DIMENSION  
Revised  
Revised  
Revised  
Revised  
in page 9 & 10  
PACKAGE OUTLINE DIMENSION  
in page 10/11/12/13  
ORDERING INFORMATION  
ORDERING INFORMATION  
in page 14  
Deleted E grade  
Added -45ns Spec.  
ORDERING INFORMATION  
Revised  
Revised PIN CONFIGURATION in page 2  
Deleted 32 pin 600 mil P-DIP Package Outline Dimension in page 12  
Rev. 1.8  
Rev. 1.9  
Jun.17.2016  
Jun.28.2016  
FEATURES  
Deleted 32-pin 600 mil P-DIP in  
Deleted WRITE CYCLE  
Notes :  
in page 7  
1.WE#, CE# must be high or CE2 must be low during all address transitions  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
0
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
FEATURES  
GENERAL DESCRIPTION  
The LY62L1024 is a 1,048,576-bit low power CMOS  
static random access memory organized as 131,072  
words by 8 bits. It is fabricated using very high  
performance, high reliability CMOS technology. Its  
standby current is stable within the range of operating  
temperature.  
Fast access time : 35/45/55/70ns  
Low power consumption:  
Operating current : 12/11/10/7mA (TYP.)  
Standby current : 1A (TYP.) LL-version  
0.8A (TYP.) SL-version  
Single 2.7V ~ 3.6V power supply  
All inputs and outputs TTL compatible  
Fully static operation  
The LY62L1024 is well designed for very low power  
system applications, and particularly well suited for  
battery back-up nonvolatile memory application.  
Tri-state output  
Data retention voltage : 1.5V (MIN.)  
Green package available  
Package : 32-pin 450 mil SOP  
32-pin 8mm x 20mm TSOP I  
The LY62L1024 operates from a single power  
supply of 2.7V ~ 3.6V and all inputs and outputs are  
fully TTL compatible  
32-pin 8mm x 13.4mm sTSOP  
36-ball 6mm x 8mm TFBGA  
PRODUCT FAMILY  
Power Dissipation  
Speed  
Product  
Family  
LY62L1024  
Operating  
Temperature  
0 ~ 70℃  
Vcc Range  
Standby(ISB1,TYP.)  
35/45/55/70ns 1µA(LL)/0.8µA(SL)  
35/45/55/70ns 1µA(LL)/0.8µA(SL)  
Operating(Icc,TYP.)  
12/11/10/7mA  
2.7 ~ 3.6V  
2.7 ~ 3.6V  
-40 ~ 85℃  
LY62L1024(I)  
12/11/10/7mA  
FUNCTIONAL BLOCK DIAGRAM  
PIN DESCRIPTION  
SYMBOL  
DESCRIPTION  
A0 - A16  
Address Inputs  
Vcc  
Vss  
DQ0 – DQ7 Data Inputs/Outputs  
CE#, CE2  
WE#  
OE#  
Chip Enable Inputs  
Write Enable Input  
Output Enable Input  
Power Supply  
128Kx8  
MEMORY ARRAY  
A0-A16  
DECODER  
VCC  
VSS  
Ground  
NC  
No Connection  
I/O DATA  
CIRCUIT  
DQ0-DQ7  
COLUMN I/O  
CE#  
CE2  
WE#  
OE#  
CONTROL  
CIRCUIT  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
1
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
PIN CONFIGURATION  
NC  
A16  
A14  
A12  
A7  
1
2
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Vcc  
A15  
CE2  
WE#  
A13  
A8  
3
4
5
A11  
A9  
1
2
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
OE#  
A10  
CE#  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
Vss  
DQ2  
DQ1  
DQ0  
A0  
A6  
6
A8  
3
A5  
7
A9  
A13  
WE#  
CE2  
A15  
Vcc  
NC  
4
5
8
A4  
A11  
OE#  
A10  
CE#  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
6
LY62L1024  
XXXXXXXX  
XXXXXXXX  
7
A3  
9
8
9
A2  
10  
11  
12  
13  
14  
15  
16  
A16  
A14  
A12  
A7  
10  
11  
12  
13  
14  
15  
16  
A1  
A0  
A6  
A1  
A5  
A2  
A3  
DQ0  
DQ1  
DQ2  
Vss  
A4  
TSOP I /sTSOP  
SOP  
A0  
A1 CE2 A3  
A6  
A8  
A
B
C
D
E
F
DQ4 A2 WE# A4  
A7 DQ0  
DQ1  
DQ5  
Vss  
NC  
A5  
Vcc  
Vcc  
Vss  
DQ6  
NC NC  
DQ2  
DQ7 OE# CE# A16 A15 DQ3  
A9 A10 A11 A12 A13 A14  
G
H
TFBGA(Top View)  
1
2
3
4
5
6
TFBGA(See through with Top View)  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
2
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
ABSOLUTE MAXIMUN RATINGS*  
PARAMETER  
SYMBOL  
VT1  
RATING  
-0.5 to 4.6  
-0.5 to VCC+0.5  
0 to 70(C grade)  
-40 to 85(I grade)  
-65 to 150  
1
UNIT  
V
Voltage on VCC relative to VSS  
Voltage on any other pin relative to VSS  
VT2  
V
℃
Operating Temperature  
TA  
℃
W
Storage Temperature  
Power Dissipation  
DC Output Current  
TSTG  
PD  
IOUT  
50  
mA  
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this  
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.  
TRUTH TABLE  
CE#  
H
CE2  
X
OE#  
X
WE#  
X
SUPPLY CURRENT  
ISB,ISB1  
MODE  
I/O OPERATION  
High-Z  
Standby  
X
L
X
X
High-Z  
ISB,ISB1  
L
H
H
H
Output Disable  
Read  
High-Z  
ICC,ICC1  
L
H
L
H
DOUT  
ICC,ICC1  
L
H
X
L
Write  
DIN  
ICC,ICC1  
Note: H = VIH, L = VIL, X = Don't care.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
3
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
DC ELECTRICAL CHARACTERISTICS  
SYMBOL  
TEST CONDITION  
MIN.  
2.7  
2.2  
- 0.2  
- 1  
TYP. *4  
3.0  
MAX.  
3.6  
VCC+0.3  
0.6  
UNIT  
PARAMETER  
Supply Voltage  
VCC  
V
V
V
*1  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
Output Leakage  
Current  
VIH  
VIL  
-
-
-
*2  
ILI  
V
V
CC ≧ VIN ≧ VSS  
CC ≧ VOUT ≧ VSS,  
Output Disabled  
IOL = 2mA  
1
A
µ
ILO  
- 1  
-
1
A
µ
Output High Voltage  
Output Low Voltage  
VOH IOH = -1mA  
VOL  
2.2  
2.7  
-
12  
11  
10  
7
-
V
V
mA  
mA  
mA  
mA  
-
-
-
-
-
0.4  
35  
33  
30  
25  
- 35  
- 45  
- 55  
- 70  
Cycle time = Min.  
CE# = VIL and CE2 = VIH  
II/O = 0mA  
,
ICC  
Other pins at VIL or VIH  
Average Operating  
Power supply Current  
Cycle time = 1 s  
µ
≧
CE# = 0.2V and CE2 VCC-0.2V,  
II/O = 0mA  
ICC1  
-
1
5
mA  
Other pins at 0.2V or VCC - 0.2V  
CE# = VIH or CE2 = VIL,  
other pins at VIL or VIH  
LL  
ISB  
-
0.3  
0.5  
mA  
-
-
-
-
-
-
1
1
0.8  
1
0.8  
0.8  
10  
20  
2
2
5
A
A
A
A
A
A
µ
µ
µ
µ
µ
µ
LLI  
Standby Power  
Supply Current  
CE# ≧VCC-0.2V  
≦
SL*5  
℃
℃
25  
or CE2 0.2V  
ISB1  
SLI*5  
Others at 0.2V or  
VCC - 0.2V  
40  
SL  
SLI  
8
Notes:  
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.  
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.  
3. Over/Undershoot specifications are characterized, not 100% tested.  
4. Typical values are included for reference only and are not guaranteed or tested.  
℃
Typical values are measured at VCC = VCC(TYP.) and TA = 25  
5. This parameter is measured at VCC = 3.0V  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
4
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
CAPACITANCE (TA = 25℃, f = 1.0MHz)  
PARAMETER  
Input Capacitance  
Input/Output Capacitance  
SYMBOL  
MIN.  
-
-
MAX  
6
8
UNIT  
pF  
pF  
CIN  
CI/O  
Note : These parameters are guaranteed by device characterization, but not production tested.  
AC TEST CONDITIONS  
Input Pulse Levels  
0.2V to VCC - 0.2V  
Input Rise and Fall Times  
Input and Output Timing Reference Levels  
Output Load  
3ns  
1.5V  
CL = 30pF + 1TTL, IOH/IOL = -1mA/2mA  
AC ELECTRICAL CHARACTERISTICS  
(1) READ CYCLE  
PARAMETER  
LY62L1024-35 LY62L1024-45 LY62L1024-55 LY62L1024-70  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
SYM.  
tRC  
UNIT  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low-Z  
Output Enable to Output in Low-Z tOLZ  
Chip Disable to Output in High-Z tCHZ  
Output Disable to Output in High-Z tOHZ  
Output Hold from Address Change tOH  
35  
-
-
-
10  
5
-
45  
-
-
-
10  
5
-
55  
-
-
-
10  
5
-
70  
-
-
-
10  
5
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tAA  
35  
35  
25  
-
45  
45  
25  
-
55  
55  
30  
-
70  
70  
35  
-
tACE  
tOE  
tCLZ  
*
*
*
*
-
-
-
-
-
-
10  
15  
15  
-
-
-
10  
15  
15  
-
-
-
10  
20  
20  
-
-
-
10  
25  
25  
-
(2) WRITE CYCLE  
PARAMETER  
LY62L1024-35 LY62L1024-45 LY62L1024-55 LY62L1024-70  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
SYM.  
tWC  
tAW  
tCW  
tAS  
tWP  
tWR  
tDW  
UNIT  
Write Cycle Time  
35  
30  
30  
0
-
-
-
45  
40  
40  
0
-
-
-
55  
50  
50  
0
-
-
-
70  
60  
60  
0
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write Time tDH  
Output Active from End of Write  
Write to Output in High-Z  
-
-
-
-
25  
0
-
-
35  
0
-
-
45  
0
-
-
55  
0
-
-
20  
0
-
-
20  
0
-
-
25  
0
-
-
30  
0
-
-
tOW  
*
5
-
5
-
5
-
5
-
tWHZ  
*
-
15  
-
15  
-
20  
-
25  
*These parameters are guaranteed by device characterization, but not production tested.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
5
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
TIMING WAVEFORMS  
READ CYCLE 1 (Address Controlled) (1,2)  
tRC  
Address  
Dout  
tAA  
tOH  
Previous Data Valid  
Data Valid  
READ CYCLE 2 (CE# and CE2 and OE# Controlled) (1,3,4,5)  
tRC  
Address  
tAA  
CE#  
tACE  
CE2  
OE#  
tOE  
tOLZ  
tOH  
tOHZ  
tCHZ  
tCLZ  
High-Z  
High-Z  
Dout  
Data Valid  
Notes :  
1.WE# is high for read cycle.  
2.Device is continuously selected OE# = low, CE# = low., CE2 = high.  
3.Address must be valid prior to or coincident with CE# = low, CE2 = high; otherwise tAA is the limiting parameter.  
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
6
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
WRITE CYCLE 1 (WE# Controlled) (1,2,4,5)  
tWC  
Address  
tAW  
CE#  
tCW  
CE2  
WE#  
Dout  
Din  
tAS  
tWP  
tWR  
tOW  
tWHZ  
High-Z  
(4)  
(4)  
tDW  
tDH  
Data Valid  
WRITE CYCLE 2 (CE# and CE2 Controlled) (1,4,5)  
tWC  
Address  
tAW  
CE#  
CE2  
tAS  
tWR  
tCW  
tWP  
WE#  
Dout  
tWHZ  
High-Z  
(4)  
tDW  
tDH  
Din  
Data Valid  
Notes :  
1.A write occurs during the overlap of a low CE#, high CE2, low WE#.  
2.During a WE#controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed  
on the bus.  
3.During this period, I/O pins are in the output state, and input signals must not be applied.  
4. If the CE#low transition and CE2 high transition occurs simultaneously with or after WE# low transition, the outputs remain in a high  
impedance state.  
5.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
7
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
DATA RETENTION CHARACTERISTICS  
PARAMETER  
for Data Retention  
SYMBOL  
TEST CONDITION  
CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V  
LL  
MIN.  
1.5  
TYP. MAX. UNIT  
V
CC  
VDR  
-
3.6  
5
V
-
-
-
-
-
-
0.5  
0.5  
0.4  
0.5  
0.4  
0.4  
A
µ
µ
µ
µ
µ
µ
LLI  
10  
2
2
5
8
A
A
A
A
A
VCC = 1.5V  
℃
℃
CE# ≧ VCC - 0.2V  
SL 25  
Data Retention Current  
IDR  
or CE2 ≦ 0.2V  
SLI  
40  
Other pins at 0.2V or VCC-0.2V  
SL  
SLI  
Chip Disable to Data  
Retention Time  
Recovery Time  
See Data Retention  
Waveforms (below)  
tCDR  
tR  
0
-
-
-
-
ns  
ns  
tRC  
*
tRC = Read Cycle Time  
*
DATA RETENTION WAVEFORM  
Low Vcc Data Retention Waveform (1) (CE# controlled)  
VDR ≧ 1.5V  
Vcc(min.)  
Vcc  
Vcc(min.)  
tCDR  
tR  
VIH  
CE# ≧ Vcc-0.2V  
VIH  
CE#  
Low Vcc Data Retention Waveform (2) (CE2 controlled)  
VDR ≧ 1.5V  
Vcc(min.)  
Vcc  
Vcc(min.)  
tCDR  
tR  
CE2 ≦ 0.2V  
CE2  
VIL  
VIL  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
8
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
PACKAGE OUTLINE DIMENSION  
32 pin 450 mil SOP Package Outline Dimension  
UNIT  
SYM.  
INCH.(BASE)  
0.120(MAX)  
MM(REF)  
3.048(MAX)  
A
A1  
A2  
b
c
D
0.004(MIN)  
0.116(MAX)  
0.016(TYP)  
0.008(TYP)  
0.817(MAX)  
0.102(MIN)  
2.946(MAX)  
0.406(TYP)  
0.203(TYP)  
20.75(MAX)  
E
±
±
11.303 0.152  
0.445 0.006  
E1  
e
±
±
0.555 0.025  
14.097 0.635  
0.050(TYP)  
1.270(TYP)  
L
±
±
0.838 0.432  
0.033 0.017  
L1  
S
y
±
±
0.055 0.008  
1.397 0.203  
0.026(MAX)  
0.004(MAX)  
0o -10o  
0.660(MAX)  
0.101(MAX)  
0o -10o  
Θ
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
9
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
32 pin 8mm x 20mm TSOP I Package Outline Dimension  
UNIT  
INCH(BASE)  
MM(REF)  
SYM.  
0.047 (MAX)  
A
1.20 (MAX)  
A1  
A2  
b
±
±
0.004 0.002 0.10 0.05  
±
±
0.039 0.002 1.00 0.05  
±
±
0.009 0.002 0.22 0.05  
c
±
±
0.006 0.002 0.155 0.055  
D
±
±
0.724 0.008 18.40 0.20  
E
±
±
0.315 0.008 8.00 0.20  
e
0.020 (TYP) 0.50 (TYP)  
HD  
L
±
±
0.787 0.008 20.00 0.20  
±
±
0.024 0.004 0.60 0.10  
L1  
y
Θ
±
±
0.0315 0.004 0.08 0.10  
0.003 (MAX) 0.08 (MAX)  
o
o
o
o
～
～
5
0
5
0
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
10  
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
32 pin 8mm x 13.4mm sTSOP Package Outline Dimension  
UNIT  
INCH(BASE)  
MM(REF)  
SYM.  
0.049 (MAX)  
A
1.25 (MAX)  
A1  
A2  
b
±
±
0.004 0.002 0.10 0.05  
±
±
0.039 0.002 1.00 0.05  
±
±
0.009 0.002 0.22 0.05  
c
±
±
0.006 0.002 0.155 0.055  
D
±
±
0.465 0.008 11.80 0.20  
E
±
±
0.315 0.008 8.00 0.20  
e
0.020 (TYP) 0.50 (TYP)  
HD  
L
±
±
13.40 0.20.  
±
0.50 0.20  
0.528 0.008  
±
0.02 0.008  
L1  
y
±
±
0.031 0.005 0.8 0.125  
0.003 (MAX) 0.076 (MAX)  
o
o
o
o
Θ
～
～
5
0
5
0
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
11  
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
36 ball 6mm × 8mm TFBGA Package Outline Dimension  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
12  
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
ORDERING INFORMATION  
Package Type Access Time  
(Speed)(ns)  
Power Type  
Temperature  
Packing  
Type  
Lyontek Item No.  
Range(℃)  
32Pin(450mil)  
SOP  
35  
45  
55  
Tube  
LY62L1024SL-35LL  
LY62L1024SL-35LLT  
LY62L1024SL-35LLI  
LY62L1024SL-35LLIT  
LY62L1024SL-45SL  
LY62L1024SL-45SLT  
LY62L1024SL-45SLI  
LY62L1024SL-45SLIT  
LY62L1024SL-55SL  
LY62L1024SL-55SLT  
LY62L1024SL-55SLI  
LY62L1024SL-55SLIT  
LY62L1024SL-55LL  
LY62L1024SL-55LLT  
LY62L1024SL-55LLI  
LY62L1024SL-55LLIT  
LY62L1024SL-70SL  
LY62L1024SL-70SLT  
LY62L1024SL-70SLI  
LY62L1024SL-70SLIT  
LY62L1024SL-70LL  
LY62L1024SL-70LLT  
LY62L1024SL-70LLI  
LY62L1024SL-70LLIT  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tube  
℃
-40 ~85  
℃
Tape Reel  
Tube  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tube  
℃
-40 ~85  
℃
Tape Reel  
Tube  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tube  
℃
-40 ~85  
℃
Tape Reel  
Tube  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tube  
℃
-40 ~85  
℃
Tape Reel  
Tube  
70  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tube  
℃
-40 ~85  
℃
Tape Reel  
Tube  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tube  
℃
-40 ~85  
℃
Tape Reel  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
13  
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
ORDERING INFORMATION  
Package Type Access Time  
(Speed)(ns)  
Power Type  
Temperature  
Packing  
Type  
Lyontek Item No.  
Range(℃)  
32Pin  
(8mmx20mm)  
TSOP I  
35  
45  
55  
Tray  
LY62L1024LL-35LL  
LY62L1024LL-35LLT  
LY62L1024LL-35LLI  
LY62L1024LL-35LLIT  
LY62L1024LL-45SL  
LY62L1024LL-45SLT  
LY62L1024LL-45SLI  
LY62L1024LL-45SLIT  
LY62L1024LL-55SL  
LY62L1024LL-55SLT  
LY62L1024LL-55SLI  
LY62L1024LL-55SLIT  
LY62L1024LL-55LL  
LY62L1024LL-55LLT  
LY62L1024LL-55LLI  
LY62L1024LL-55LLIT  
LY62L1024LL-70SL  
LY62L1024LL-70SLT  
LY62L1024LL-70SLI  
LY62L1024LL-70SLIT  
LY62L1024LL-70LL  
LY62L1024LL-70LLT  
LY62L1024LL-70LLI  
LY62L1024LL-70LLIT  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
70  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
14  
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
ORDERING INFORMATION  
Package Type Access Time  
(Speed)(ns)  
Power Type  
Temperature  
Packing  
Type  
Lyontek Item No.  
Range(℃)  
32Pin  
(8mmx13.4mm)  
sTSOP  
35  
45  
55  
Tray  
LY62L1024RL-35LL  
LY62L1024RL-35LLT  
LY62L1024RL-35LLI  
LY62L1024RL-35LLIT  
LY62L1024RL-45SL  
LY62L1024RL-45SLT  
LY62L1024RL-45SLI  
LY62L1024RL-45SLIT  
LY62L1024RL-55SL  
LY62L1024RL-55SLT  
LY62L1024RL-55SLI  
LY62L1024RL-55SLIT  
LY62L1024RL-55LL  
LY62L1024RL-55LLT  
LY62L1024RL-55LLI  
LY62L1024RL-55LLIT  
LY62L1024RL-70SL  
LY62L1024RL-70SLT  
LY62L1024RL-70SLI  
LY62L1024RL-70SLIT  
LY62L1024RL-70LL  
LY62L1024RL-70LLT  
LY62L1024RL-70LLI  
LY62L1024RL-70LLIT  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
70  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Ultra Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
15  
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
ORDERING INFORMATION  
Package Type Access Time  
(Speed)(ns)  
Power Type  
Temperature  
Packing  
Type  
Lyontek Item No.  
Range(℃)  
36Ball  
(6mmx8mm)  
TFBGA  
35  
45  
55  
Tray  
LY62L1024GL-35LLI  
LY62L1024GL-35LLIT  
LY62L1024GL-45SLI  
LY62L1024GL-45SLIT  
LY62L1024GL-55SLI  
LY62L1024GL-55SLIT  
LY62L1024GL-55LLI  
LY62L1024GL-55LLIT  
LY62L1024GL-70SLI  
LY62L1024GL-70SLIT  
LY62L1024GL-70LLI  
LY62L1024GL-70LLIT  
Ultra Low Power  
℃
-40 ~85  
℃
℃
℃
℃
℃
℃
Tape Reel  
Tray  
Special Ultra Low  
Power  
℃
-40 ~85  
Tape Reel  
Tray  
Special Ultra Low  
Power  
℃
-40 ~85  
Tape Reel  
Tray  
Ultra Low Power  
℃
-40 ~85  
Tape Reel  
Tray  
70  
Special Ultra Low  
Power  
℃
-40 ~85  
Tape Reel  
Tray  
Ultra Low Power  
℃
-40 ~85  
Tape Reel  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
16  
LY62L1024  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.9  
THIS PAGE IS LEFT BLANK INTENTIONALLY.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
17  
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