If the supply voltage, +VCC, exceeds the gate-to-source
breakdown voltage of QEXT, and the output connection
(drain of QEXT) is broken, QEXT could fail. If the gate-to-
source breakdown voltage is lower than +VCC, QEXT can be
protected with a 12V zener diode connected from gate to
source.
+VCC
16
47nF
1
13
14
TIP30B
etc.
XTR110
Two PNP discrete transistors (Darlington-connected) can be
used for QEXT—see Figure 2. Note that an additional capaci-
tor is required for stability. Integrated Darlington transistors
are not recommended because their internal base-emitter
resistors cause excessive error.
0.047µF
2
2N2907
etc.
IOUT
RL
Common
TRANSISTOR DISSIPATION
Maximum power dissipation of QEXT depends on the power
supply voltage and full-scale output current. Assuming that
the load resistance is low, the power dissipated by QEXT is:
FIGURE 2. QEXT Using PNP Transistors.
PMAX = (+VCC) IFS
(2)
+VCC
16
The transistor type and heat sinking must be chosen accord-
ing to the maximum power dissipation to prevent overheat-
ing. See Table II for general recommendations.
V
REF Force
15
12
11
VREF Sense
VREF Adjust
VREF
XTR110
R
20kΩ
(1)
RS
PACKAGE TYPE
ALLOWABLE POWER DISSIPATION
TO-92
TO-237
TO-39
TO-220
TO-3
Lowest: Use minimum supply and at +25°C.
Acceptable: Trade-off supply and temperature.
Good: Adequate for majority of designs.
Excellent: For prolonged maximum stress.
Use if hermetic package is required.
Adjust Range
±5% Optimum
Common
2
NOTE: (1) RS gives higher resolution with reduced
range, set RS = 0Ω for larger range.
TABLE II. External Transistor Package Type and
Dissipation.
FIGURE 3. Optional Adjustment of Reference Voltage.
INPUT VOLTAGE RANGE
The internal op amp A1 can be damaged if its non-inverting
input (an internal node) is pulled more than 0.5V below
common (0V). This could occur if input pins 3, 4 or 5 were
driven with an op amp whose output could swing negative
under abnormal conditions. The voltage at the input of A1 is:
Force
15
12
QREF
16
2
+VCC
Sense
+10VREF
XTR110
(VREF IN
16
)
(VIN1
)
(VIN2)
VA1
=
+
+
(3)
4
2
This voltage should not be allowed to go more negative than
–0.5V. If necessary, a clamp diode can be connected from
the negative-going input to common to clamp the input
voltage.
For 100mA with VCC up to
40V use 2N3055 for QREF
.
FIGURE 4. Increasing Reference Current Drive.
COMMON (Ground)
Careful attention should be directed toward proper con-
nection of the common (grounds). All commons should
be joined at one point as close to pin 2 of the XTR110 as
possible. The exception is the IOUT return. It can be
returned to any point where it will not modulate the
common at pin 2.
3 should be connected to this point. The circuit in Figure 3
shows adjustment of the voltage reference.
The current drive capability of the XTR110’s internal refer-
ence is 10mA. This can be extended if desired by adding an
external NPN transistor shown in Figure 4.
OFFSET (ZERO) ADJUSTMENT
VOLTAGE REFERENCE
The offset current can be adjusted by using the potentiom-
eter, R1, shown in Figure 5. Set the input voltage to zero and
then adjust R1 to give 4mA at the output. For spans starting
The reference voltage is accurately regulated at pin 12
(VREF SENSE). To preserve accuracy, any load including pin
®
XTR110
6
