找货询价

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

QQ咨询

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

技术支持

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

售后咨询

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

PX3516ADDG-R4

型号:

PX3516ADDG-R4

品牌:

INFINEON[ Infineon ]

页数:

12 页

PDF大小:

1307 K

PX3516  
Synchronous Rectified Buck MOSFET Driver IC  
Synchronous Rectified Buck MOSFET Driver IC  
PX3516  
November 22nd - 2012  
Published by Infineon Technologies AG  
http://www.infineon.com/DCDC  
Power Management  
1 of 12  
PX3516  
PX3516  
Synchronous Rectified Buck MOSFET Driver IC  
General Description  
Applications:  
The PX3516 is a dual high speed driver designed to drive a  
wide range of high-side and low-side power N-channel  
MOSFET in synchronous rectified buck converters. When  
combined with Infineon’s Primarion™ Controller Family of  
Digital Multi-phase Controllers and N-channel MOSFET, the  
PX3516 forms a complete core-voltage regulator solution  
for advanced micro and graphics processors as well as  
point-of-load applications.  
Core power regulation for Intel® and AMD®  
micropocessors server motherboard and  
notebook market.  
POL power converters for memory, DSP, FPGA,  
ASIC  
High current DC-DC converters  
Memory  
The PX3516 provides the capability of driving the high-side  
gate and low-side gate with a single 5V supply for optimized  
operation. This 5V supply with suitable decoupling can also  
be used to provide the supply for the onboard logic. The  
input voltage for the power stage can range from 5V up to  
24V making the driver suitable for Notebook applications.  
Features:  
Dual MOSFET driver for synchronous rectified  
bridge converters  
Single 5V supply for both logic and MOSFET  
gate drive voltages for optimal efficiency  
Shoot-through protection is integrated into the IC which  
prevents both upper and lower MOSFET from conducting  
simultaneously and to minimize dead time. The PX3516  
has a minimized propagation delay from input to output with  
fast rise and fall times.  
Fast rise and fall times supports switching rates  
of up to 2MHz  
Capable of sinking more than 4A peak current for  
low switching losses  
Shoot through protection  
The PX3516 driver also feature a three-state PWM input  
which, when used together with Infineon’s Primarion™  
Digital Controllers, eliminates the need for Schottky diodes  
that are often used in systems to protect the load from  
reversed output voltage events.  
Three-state PWM input for output stage  
shutdown  
VCC under-voltage protection  
Lead-free (RoHS compliant) TDSON-10-2  
package  
TDSON-10-2  
1
10  
UGATE  
BOOT  
N/C  
PHASE  
PVCC  
N/C  
Type  
Package  
Order info  
2
3
4
5
9
8
7
6
PX3516  
PX3516ADDG-R4  
PG-TDSON-10-2  
GND  
PWM  
GND  
VCC  
LGATE  
2 of 12  
3516  
PX3516  
Synchronous Rectified Buck MOSFET Driver IC  
BLOCK DIAGRAM  
VCC  
BOOT  
PVCC  
HS Driver  
UGATE  
PHASE  
Level  
UVLO  
Shifter  
500k  
HS  
Logic  
+
-
Shoot Through  
16k5  
Protection  
+
-
Input  
Logic  
PWM  
7k1  
3 -State  
LS  
LGATE  
Logic  
LS Driver  
500k  
IC DRIVER  
GND  
PVCC  
Figure 1 : block diagram of the PX3516  
3 of 12  
PX3516  
PX3516  
Synchronous Rectified Buck MOSFET Driver IC  
Typical VR12 Multiphase Application  
+12V  
VCC  
UGATE  
VSW  
+5V  
L
PVCC  
PX3516  
PWM  
GND  
BOOT  
LGATE  
Cb  
Cb  
Cb  
Cb  
Rb  
Rb  
Rb  
Rb  
R1  
VDD  
VINSEN  
+3.3V  
R2  
PrimarionTM  
Digital  
VCC  
UGATE  
VSW  
L
L
L
PVCC  
PWM  
GND  
Controller  
PX3516  
BOOT  
TSEN  
LGATE  
VR_EN  
PWM1  
ISEN1N  
ISEN1P  
PWM2  
VR_READY  
BVR_READY  
VCC  
UGATE  
VSW  
ISEN2N  
ISEN2P  
PWM3  
PVCC  
PX3516  
PWM  
BOOT  
GND  
LGATE  
CPU/  
DDR  
ISEN3N  
ISEN3P  
PWM4  
I2C Interface  
SDA  
SCL  
VCC  
UGATE  
VSW  
SADDR_M  
SADDR_L  
ISEN4N  
ISEN4P  
PVCC  
PWM  
GND  
PPXX33551166  
BOOT  
LGATE  
Rext_m  
Cext_m  
VSENP  
VSENN  
Figure 2 : Typical application diagram of the PX3516  
4 of 12  
PX3516  
PX3516  
Synchronous Rectified Buck MOSFET Driver IC  
Absolute Maximum Ratings  
Stresses above those listed in Table 1 “Absolute Maximum Ratings” may cause permanent damage to the device.  
These are absolute stress ratings only and operation of the device is not implied at these or any other conditions in  
excess of those given in the operational sections of this specification.  
Table 1. Absolute Maximum Ratings1  
Description  
Min  
Max  
Units  
Conditions  
VVCC  
VPVCC  
VBOOT  
VCC supply voltage (DC)  
-0.3  
+7  
V
PVCC supply voltage (DC)  
-0.3  
+7  
+30  
+7  
V
V
V
Referenced to GND  
BOOT voltage  
-0.3  
-1  
VBOOT - VPHASE BOOT to PHASE voltage  
Referenced to PHASE  
DC  
VPHASE  
+30  
+35  
V
V
PHASE voltage, DC  
-1  
VPHASE  
VPWM  
PHASE voltage, pulsed  
Input voltage  
-10  
Pulse width < 30ns  
-0.3  
VPHASE – 0.3  
-0.3  
+5.5  
V
UGATE  
VBOOT + 0.3  
VPVCC + 0.3  
150  
V
LGATE  
V
TJ  
Junction temperature  
Storage temperature  
-25  
°C  
°C  
TSTG  
-55  
150  
1 At TJ = 25°C, unless otherwise specified  
5 of 12  
PX3516  
Recommended Operating Conditions  
Table 2. Recommended Operating Conditions  
Symbol  
Description  
VCC supply voltage  
Min  
Nom  
Max  
Units  
VVCC  
+4.5  
+5.0  
+6.5  
V
rising edge: dvCC/dt>5V/50ms  
PVCC supply voltage  
VPVCC  
fPWM  
+4.5  
0.1  
0
+5.0  
+6.5  
2
V
PWM signal transition frequency  
Junction temperature  
MHz  
TJ  
125  
85  
°
C
C
TAMBIENT  
Operating ambient temperature  
Thermal resistance, junction-to-air, note 2  
Thermal resistance, junction-to-case, note 3  
0
°
ΘJA  
48  
7
K/W  
K/W  
(0)  
ΘJC  
Electrical Characteristics4  
Table 3. Electrical Characteristics  
Parameter  
Supply Characteristics  
VCC supply current  
Conditions  
Symbol  
Min  
Typ  
Max  
Units  
VPWM = 0V  
IVCC  
400  
A  
PVCC supply current  
Quiescent current  
VPWM = 0V  
IPVCC  
22  
410  
2.4  
A
A
VPWM = Open  
fPWM=300kHz  
rising edge:  
IPVCCQ+IVCCQ  
PVCC Supply current  
mA  
VCC rising threshold  
3.3  
3.0  
3.9  
V
dvCC/dt>5V/50ms  
VCC falling threshold  
2.7  
V
PWM Input  
Input current  
VPWM = +3.3V  
VPWM = 0V  
IPWM_H  
IPWM_L  
380  
-310  
5
A
A
Sink/source impedance  
VPWM = 1V  
RPWM  
3
7
kꢁ  
Shutdown window (3-state)  
VPWM_SD  
1.37  
1.5  
1.77  
V
VPWM_O  
1.5  
V
PWM open voltage  
VPWM_H  
VPWM_L  
1.9  
0.7  
2.1  
2.4  
1.3  
V
V
PWM rising threshold  
PWM falling threshold  
1.15  
Minimum pulse width high side  
Minimum off time  
pulse width on PWM  
pulse width on PWM  
ton_min_PWM  
toff_min_PWM  
25  
ns  
ns  
100  
Upper Gate (UGATE) Output  
Shutdown hold off time  
UGATE rise time  
Note5, no load  
Note5, 3nF load  
Note 5, 3nF load  
tSSHD_UG  
tr_UG  
170  
10  
ns  
ns  
ns  
UGATE fall time  
tf_UG  
10  
2 ΘJA is measured with the component mounted on a high effective thermal conductivity test board in free air  
3 For  
JC, the case temperature location is the center of the exposed metal pad on the underside of the package  
4 Operating conditions: VCC = +5.0V, PVCC = +5.0V, TA = 25  
C, unless otherwise specified.  
Θ
°
PX3516  
Page 6 of 12  
Parameter  
Conditions  
Note5, no load  
Note5, no load  
Note5, no load  
Symbol  
Min  
Typ  
Max  
Units  
tPDTS_UG  
tD(ON)_UG  
tD(OFF)_UG  
12  
35  
20  
ns  
ns  
ns  
3-state to high propagation delay  
UGATE turn-on propagation delay  
UGATE turn-off propagation delay  
Lower Gate (LGATE) Output  
Shutdown hold-off time  
LGATE rise time  
Note5, no load  
tSSHD_LG  
tr_LG  
170  
10  
5
ns  
ns  
ns  
ns  
ns  
ns  
Note5, 3nF load  
Note5, 3nF load  
Note5, no load  
Note5, no load  
LGATE fall time  
tf_LG  
3-state to low propagation delay  
LGATE turn-on propagation delay  
LGATE turn-off propagation delay  
Output Characteristics  
tPDTS_LG  
tD(ON)_LG  
tD(OFF)_LG  
11  
23  
7
Note5  
, no load  
Upper drive source current  
Upper drive source impedance  
Upper drive sink current  
Note5, current pulse <  
ISRC_UG = 200mA  
ISRC_UG  
RSRC_UG  
ISNK_UG  
RSNK_UG  
ISRC_LG  
RSRC_LG  
ISNK_LG  
2
0.9  
2
A
A
A
A
Note5, current pulse <  
Upper drive sink impedance  
Lower drive source current  
Lower drive source impedance  
Lower drive sink current  
ISINK_UG = 200mA  
0.95  
2
Note5, current pulse <  
ISRC_UG = 2A  
0.95  
4
Note5, current pulse <  
Lower drive sink impedance  
RSNK_LG  
0.47  
ISINK_UG = 200mA  
5
Parameter verified by design  
.
Timing Diagram  
1.37V<PWM<1.77V  
Figure 3 : Timing Diagram  
PX3516  
Page 7 of 12  
Table 4. Pin Function Description  
Pin # Name  
Description  
1
2
3
4
UGATE Upper gate drive output. Connect to the gate of high-side power N-channel MOSFET  
Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and  
BOOT  
the PHASE pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the  
Internal Bootstrap Device section herein for guidance in choosing the capacitor value.  
N/C  
No connection  
The PWM signal is the control input for the driver and is to be connected to the PWM output of the controller.  
PWM  
The PWM signal can enter three distinct states during operation. See figure 1 for further details.  
Can be left N/C since main GND connection to circuit board is via die pad. Must not be used as single  
GND  
5
6
7
8
9
ground connection.  
LGATE Lower gate drive output. Connect to the gate of the low-side power N-channel MOSFET  
This pin supplies housekeeping/logic power to the IC, it is rated for +5V operation. Place a high quality low  
VCC  
ESR ceramic capacitor from this pin to GND.  
N/C  
No connection  
This pin supplies power to the lower and upper gate, rated for +5V. Place a high quality low ESR ceramic  
PVCC  
capacitor from this pin to GND.  
Connect this pin to the source of the upper MOSFET and the drain of the lower MOSFET. This pin provides  
10 PHASE  
Die Pad  
a return path for the upper gate drive.  
Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the  
driver. It is mandatory to connect the die paddle electrically and thermally to the circuit board.  
PX3516  
Page 8 of 12  
gate to source voltage of the High Side MOSFET is also  
monitored. When VGS(High Side) is discharged below  
1V, a threshold known to turn High Side MOSFET off, a  
secondary delay is initiated, which results in Low Side  
being gated “ON” regardless of the state of the “VSWH”  
pin. This way it will be ensured that the converter can  
sink current efficiently and the bootstrap capacitor will be  
refreshed appropriately during each switching cycle.  
Mode of operation  
The PX3516 functionality is enabled by the VCC pin.  
When the VCC pin voltage overcomes the VCC rising  
voltage threshold the driver begins to operate depending  
on the PWM status. Before the VCC voltage reaches the  
VCC rising threshold both MOSFET are kept in OFF  
state. For VCC is recommended to have a slope for the  
rising edge higher then 5V/50ms. On the PVCC pin no  
UVLO function is implemented.  
During the start up depending on several factors it can  
be that the power input for the conversion (12V) rise  
before the 5V input. In this case it could happen that the  
high side has an induced turn on. In order to avoid this  
undesirable effect the PX3516 embeds a resistance of  
500 kOhm between UGATE pin and PHASE pin.  
The VCC (as well the PVCC) can range between 4.5V  
and 6.5V; this gives the flexibility to work with the 5V bus  
or in case optimize the efficiency choosing a different  
driving voltage.  
Current capability and Internal  
Bootstrap  
The PX3516 functionality is driven by the PWM signal  
transitions. When the PWM signal performs a transition  
between low state to high state (PWM voltage higher  
than 2.4V) the Low Side MOSFET is turned off, after the  
turn off delay propagation time. Then the High Side  
MOSFET is turned on, after the turn on propagation  
delay time. Once the on time is expired the PWM signal  
provides a transition between the high states to the low  
state (PWM voltage lower than 1V). This will drive the  
High Side MOSFET from the ON state to the OFF state,  
after the turn off propagation delay time. The PX3516 is  
also capable to drive the two external MOSFET both in  
off state. When the PWM signal enters in the shut down  
window or 3-state (typically between 1.37V and 1.77V)  
after the shut down hold off time both MOSFET are  
switched off. This feature is useful when the IC controller  
wants to reduce the number of active phases in order to  
reduce the power consumption. In principle the 3-state  
status can be used also to improve the transition  
between high loads to low load.  
The PX3516 implements high current capability and low  
ohmic pull down resistances for the driving stages. The  
high current capability ensures fast switching transition  
for the MOSFET in order to reduce the switching losses  
(2A of driving source/sink current for the upper  
MOSFET) even with high gate charge high side. The low  
ohmic pull down resistance (Low driver sink impedance  
0.5 Ohm) is mainly important to avoid the induced turn  
on phenomenon on the low side during the fast turn on  
of the high side MOSFET.  
The high side is powered through the bootstrap circuitry  
The PX3516 provides embedded bootstrap diode, so to  
complete the power network only a capacitance between  
PHASE and BOOT is needed. In many cases the  
PX3516 is optimized for the best switching behavior so  
an external resistance is not needed. The bootstrap  
capacitance is chosen depending on the high side gate  
charge. The following formula is giving a good  
The PX3516 implements an embedded resistors  
network, which forces the PWM pin of the device in the  
middle of the shut down window, if the PWM input is left  
floating from the controller.  
estimation of the voltage drop across the bootstrap  
capacitance due to the charging of the high side:  
CBOOT>QGATE/  
VBOOT  
In order to avoid cross conduction between the High  
Side MOSFET and the Low Side MOSFET an anti-  
shoot-through control is implemented with the adaptive  
scheme. The adaptive scheme is implemented in order  
to use a variety of different power MOSFET for different  
kind of conversion. Nevertheless the dead time is kept  
as short as possible in order to increase the efficiency of  
the overall solution.  
Where the VBOOT is the desired variation of the  
bootstrap voltage.  
The low side driver is powered through the PVCC pin.  
Same considerations and formula done for the bootstrap  
capacitance can be done for the capacitance used to  
filter the PVCC pin.  
The driver includes gate drive functionality to protect  
against shoot through. In order to protect the power  
stage from overlap, both High Side and Low Side  
MOSFET being on at the same time, the adaptive  
control circuitry monitors the voltage at the “PHASE” pin.  
When the PWM signal goes low, the High Side MOSFET  
will begin to turn off. Once the “PHASE” pin falls below  
1V, the Low Side MOSFET is gated on. Additionally, the  
The driving stage of the PX3516 is optimized for the 5V  
driving voltage. This design makes the PX3516 driver  
more suitable than other variable driving voltage drivers  
optimized for 10V – 12V range. In this case superior  
performance are expected using an optimized 5V driver  
at 6V of driving voltage compared to a optimized 12V  
driver used at the same driving voltage.  
PX3516  
Page 9 of 12  
Minimize the current loop of the output and input  
power trains. Short the source connection of the  
lower MOSFET to ground as close to the transistor  
pin as feasible. Input capacitors (especially ceramic  
decoupling) should be placed as close to the drain  
of upper and source of lower MOSFET as possible.  
Power dissipation  
The power dissipation of the driver is given by gate  
charge of the external power MOSFET. The following  
formulas held:  
Pdiss=PVCC*FSW*(QGHS+QGLS)  
To optimize heat spreading, copper should be placed  
directly underneath the IC. The copper area can be  
extended beyond the bottom area of the IC and/or  
connected to buried copper plane(s) with thermal vias.  
This combination of vias for vertical heat escape,  
extended copper plane, and buried planes for heat  
spreading allows the IC to achieve its full thermal  
potential.  
Where FSW is the switching frequency and QGHS and  
QGLS are respectively the gate charge of the high side  
and the gate charge of the low side at the PVCC driving  
voltage.  
The very low thermal resistance package used for the  
PX3516 allows the device to avoid any usage of external  
resistances to decrease the power dissipation inside the  
driver. Anyway since the thermal resistance is strongly  
influenced by the numbers of layers used in the board, it  
is recommended to check roughly the expected junction  
temperature via the power calculation.  
Thresholds variations  
The possibility to use a wide range of power supply  
voltages (from 4.5V up to 6.5V) implies a shifting in the  
thresholds voltages for the following parameters:  
VPWM_O, VPWM_H, VPWM_L, VPWM_SD_L,  
VPWM_SD_H (where VPWM_SD_L/H are respectively  
the low and high thresholds for the shut down windows).  
The typical behavior of these thresholds with the power  
supply is shown in the following graph.  
Layout Considerations  
The PX3516 has a good protection systems against  
unwanted overshoot and undershoot; the PHASE pin  
can range between dynamically -10V to 35V (30ns).  
Anyway the parasitic inductances of the PCB and of the  
power devices’ packaging (both upper and lower  
MOSFET) can cause serious ringing, exceeding  
absolute maximum rating of the devices. Careful layout  
can help minimize such unwanted stress. The following  
advice is meant to lead to an optimized layout:  
Keep decoupling loops (PVCC-GND and BOOT-  
PHASE) as short as possible.  
Minimize trace inductance, especially on low-  
impedance lines. All power traces (UGATE, PHASE,  
LGATE, GND, PVCC) should be short and wide, as  
much as possible.  
Minimize the area of the PHASE node. Ideally, the  
source of the upper and the drain of the lower  
MOSFET should be as close as thermally allowable.  
Figure 4 : Variation of the PWM input threshold  
versus the VCC supply voltage  
PX3516  
Page 10 of 12  
Physical Characteristics (PG-TDSON-10-2 package)  
Figure 5. Physical Dimensions of the package.  
Suggested land pattern  
3.40  
0.60  
0.25  
1.70  
0.30  
2.10  
0.20  
0.70  
TYP  
0.50  
O 0.30  
TYP  
0.70  
TYP  
0.25  
Figure 6: Physical dimensions of the PCB footprint.  
PX3516  
Page 11 of 12  
For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the  
Infineon Technologies Companies and Representatives worldwide: see the address list on our webpage at  
http://www.infineon.com/DCDC  
CoreControlTM, OptiMOS and OptiMOS II Primarion are trademarks of Infineon Technologies AG.  
We listen to Your Comments  
Any information within this document that you feel is wrong, unclear or missing at all?  
Your feedback will help us to continously improve the quality of this document.  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© 2011 Infineon Technologies AG  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of  
conditions or characteristics. With respect to any examples or hints given herein, any typical  
values stated herein and/or any information regarding the application of the device,  
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,  
including without limitation, warranties of non-infringement of intellectual property rights  
of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please  
contact the nearest Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances. For information  
on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with  
the express written approval of Infineon Technologies, if a failure of such components can  
reasonably be expected to cause the failure of that life-support device or system or to affect  
the safety or effectiveness of that device or system. Life support devices or systems are  
intended to be implanted in the human body or to support and/or maintain and sustain  
and/or protect human life. If they fail, it is reasonable to assume that the health of the user  
or other persons may be endangered.  
PX3516  
Page 12 of 12  
厂商 型号 描述 页数 下载

SEMIKRON

PX308 散热器对于所有隔离式电源模块[ Heatsink For all isolated power modules ] 2 页

SEMIKRON

PX308/300F 散热器对于所有隔离式电源模块[ Heatsink For all isolated power modules ] 2 页

ETC

PX314ZG/100 VERGUSSMASSEN EPOXY SW 100G\n[ VERGUSSMASSEN EPOXY SW 100G ] 6 页

ETC

PX314ZG/1000 VERGUSSMASSEN EPOXY 1000G[ VERGUSSMASSEN EPOXY 1000G ] 5 页

ETC

PX314ZG/250 VERGUSSMASSEN EPOXY 250G\n[ VERGUSSMASSEN EPOXY 250G ] 6 页

ETC

PX314ZG/50 VERGUSSMASSEN EPOXY SW 50G\n[ VERGUSSMASSEN EPOXY SW 50G ] 6 页

ETC

PX314ZG/500 VERGUSSMASSEN EPOXY SW 500G\n[ VERGUSSMASSEN EPOXY SW 500G ] 6 页

INTERSIL

PX3511A 与保护功能先进的同步整流降压MOSFET驱动器[ Advanced Synchronous Rectified Buck MOSFET Drivers with Protection Features ] 10 页

INTERSIL

PX3511ADAG 与保护功能先进的同步整流降压MOSFET驱动器[ Advanced Synchronous Rectified Buck MOSFET Drivers with Protection Features ] 10 页

INTERSIL

PX3511ADAG-R3 与保护功能先进的同步整流降压MOSFET驱动器[ Advanced Synchronous Rectified Buck MOSFET Drivers with Protection Features ] 10 页

PDF索引:

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

0

1

2

3

4

5

6

7

8

9

IC型号索引:

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

0

1

2

3

4

5

6

7

8

9

Copyright 2024 gkzhan.com Al Rights Reserved 京ICP备06008810号-21 京

0.210859s