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5V5201DCGI8

型号：

5V5201DCGI8

品牌：

IDT[ INTEGRATED DEVICE TECHNOLOGY ]

页数：

18 页

PDF大小：

248 K

下载PDF手册
Single Channel Type-1 M-LVDS to  
LVTTL Transceiver  
IDT5V5201  
Version -  
May 18, 2006  
6024 Silver Creek Valley Road, San Jose, CA 95138  
Telephone: (800) 345-7015 • TWX: 910-338-2070 • FAX: (408) 284-2775  
Printed in U.S.A.  
© 2006 Integrated Device Technology, Inc.  
DISCLAIMER  
Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance  
and to supply the best possible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The  
Company makes no representations that circuitry described herein is free from patent infringement or other rights of third parties which may result from its use. No license is  
granted by implication or otherwise under any patent, patent rights or other rights, of Integrated Device Technology, Inc.  
LIFE SUPPORT POLICY  
Integrated Device Technology's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to  
such intended use is executed between the manufacturer and an officer of IDT.  
1. Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform,  
when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.  
2. A critical component is any components of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device  
or system, or to affect its safety or effectiveness.  
Table of Contents  
TABLE OF CONTENTS ........................................................................................................................................................... 3  
LIST OF TABLES .................................................................................................................................................................... 4  
LIST OF FIGURES ................................................................................................................................................................... 5  
FEATURES.............................................................................................................................................................................. 6  
APPLICATIONS....................................................................................................................................................................... 6  
DESCRIPTION......................................................................................................................................................................... 6  
FUNCTIONAL BLOCK DIAGRAM.......................................................................................................................................... 7  
1
2
3
PIN ASSIGNMENT .......................................................................................................................................................... 8  
PIN DESCRIPTION ......................................................................................................................................................... 9  
ELECTRICAL SPECIFICATION ................................................................................................................................... 10  
3.1  
3.2  
ABSOLUTE MAXIMUM RATING AND RECOMMENDED OPERATION CONDITIONS ................................. 10  
LVTTL DRIVER/RECEIVER CHARACTERISTICS .......................................................................................... 11  
3.2.1 M-LVDS to LVTTL................................................................................................................................ 11  
M-LVDS DRIVER TYPE-1 RECEIVER CHARACTERISTICS ......................................................................... 12  
3.3  
ORDERING INFORMATION.................................................................................................................................................. 18  
Table of Contents  
3
May 18, 2006  
 
List of Tables  
Table-1  
Table-2  
Table-3  
Table-4  
Table-5  
Table-6  
Table-7  
Table-8  
Table-9  
Table-10  
Table-11  
Pin Description............................................................................................................................................... 9  
Absolute Maximum Rating........................................................................................................................... 10  
Recommended Operation Conditions.......................................................................................................... 10  
LVTTL DC Parameters ................................................................................................................................ 11  
LVTTL AC Parameters................................................................................................................................. 11  
M-LVDS Type-1 Receiver Input Threshold Test Voltages........................................................................... 12  
M-LVDS DC Parameters.............................................................................................................................. 13  
M-LVDS Input Current Parameters.............................................................................................................. 15  
M-LVDS AC Parameters.............................................................................................................................. 16  
M-LVDS Type-1 Receiver AC Parameters .................................................................................................. 17  
M-LVDS Driver AC Parameter..................................................................................................................... 17  
List of Tables  
4
May 18, 2006  
List of Figures  
Figure-1  
Figure-2  
Figure-3  
Figure-4  
Figure-5  
Figure-6  
Figure-7  
Figure-8  
Figure-9  
Figure-10  
Functional Block Diagram .............................................................................................................................. 7  
IDT5V5201 SOIC8 Package Pin Assignment ................................................................................................ 8  
LVTTL Output Test Circuit and Waveforms ................................................................................................. 11  
M-LVDS Driver Output Voltage Test Circuit ................................................................................................. 13  
M-LVDS Driver Short-Circuit Test Circuit ..................................................................................................... 14  
M-LVDS Type-1 Receiver Input Common-mode Range Test Circuit .......................................................... 14  
Various Input Currents Test Circuit .............................................................................................................. 15  
Differential Skew .......................................................................................................................................... 16  
M-LVDS Output Voltage Test Circuit ........................................................................................................... 16  
Timing and Voltage Definitions for the Output Signal .................................................................................. 17  
List of Figures  
5
May 18, 2006  
Single Channel Type-1 M-LVDS to  
LVTTL Transceiver  
IDT5V5201  
FEATURES  
APPLICATIONS  
‹
Main Features  
–
–
–
–
Backplane transmission  
Telecommunication system  
Data communications  
–
–
–
–
–
Up to 166 MHz LVTTL input/output signal  
ATCA clock distribution  
M-LVDS interface allows common-mode voltage: -1 V to 3.4 V  
Power up and power down glitch free  
M-LVDS interface pins in high impedance state when the  
device is powered down or VDD < 1.5 V  
–
Capable of driving bus load from 30 Ω to 55 Ω  
‹
Other Features  
–
–
–
Low power consumption < 120 mW  
Hot swappable  
8-pin SOIC package  
DESCRIPTION  
The IDT5V5201 is a transceiver which can interchange data across  
multipoint data bus structures.  
and M-LVDS signals. The drivers and the receivers can be enabled or  
disabled by external pins. The M-LVDS driver is capable of driving bus  
load from 30 Ω to 55 Ω. The M-LVDS interface allows common-mode  
voltage range of -1 V to 3.4 V.  
The device has a LVTTL driver and receiver, a selectable Type-1 M-  
LVDS receiver and M-LVDS driver. It translates between LVTTL signals  
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.  
6
May 18, 2006  
DSC-6984/-  
2006 Integrated Device Technology, Inc.  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
FUNCTIONAL BLOCK DIAGRAM  
RE_EN  
OUT  
M-LVDS Interface  
LVTTL Interface  
M_A  
IN  
M_B  
DR_EN  
Figure-1 Functional Block Diagram  
Functional Block Diagram  
7
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
1
PIN ASSIGNMENT  
VDD  
M_B  
M_A  
GND  
OUT  
1
2
3
4
8
7
6
5
RE_EN  
DR_EN  
IN  
IDT5V5201  
Figure-2 IDT5V5201 SOIC8 Package Pin Assignment  
Pin Assignment  
8
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
2
PIN DESCRIPTION  
Table-1 Pin Description  
Name  
Pin No.  
I/O  
Type  
Description  
Global Signal  
I
DR_EN: M-LVDS Driver Enable  
This pin controls the M-LVDS driver: high for enable and low for disable.  
DR_EN  
3
2
LVTTL  
LVTTL  
Pull-down  
RE_EN: Type-1 M-LVDS Receiver and LVTTL Driver Enable  
This pin controls the Type-1 M-LVDS receiver and LVTTL driver: high for disable and low for  
enable. Note that the LVTTL driver is in high impedance state when disabled.  
I
RE_EN  
Pull-up  
LVTTL Interface  
IN: LVTTL Input  
An up to 166 MHz LVTTL signal is input on this pin.  
IN  
4
1
I
LVTTL  
LVTTL  
OUT: LVTTL Output  
This pin outputs an up to 166 MHz signal.  
OUT  
O
M-LVDS Interface  
M_A  
M_B  
6
7
M_A/M_B: Positive/Negative M-LVDS Data Bus Interface  
This pair of pins are connected to the M-LVDS data bus.  
I/O  
M-LVDS  
Power Supply and Ground  
3.3 V Power Supply  
Ground  
VDD  
GND  
8
5
Power  
-
-
Ground  
Pin Description  
9
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
3
ELECTRICAL SPECIFICATION  
3.1 ABSOLUTE MAXIMUM RATING AND RECOMMENDED OPERATION CONDITIONS  
Table-2 Absolute Maximum Rating  
Symbol  
Parameter  
Range  
VDD  
VIN  
Supply Voltage  
-0.5 V to 4.1 V  
-0.5 V to 4.1 V  
-1.8 V to 4 V  
-0.3 V to 4 V  
-1.8 V to 4 V  
±8 kV  
Input Voltage  
Output Voltage  
RE_EN, DR_EN, IN_A, IN_B  
M_A, M_B  
OUT_A, OUT_B  
M_A, M_B  
VOUT  
Electrostatic Discharge  
Human Body Model M_A, M_B  
All pins  
±2 kV  
TJ  
Junction Temperature  
Storage Temperature  
150°C  
TS  
-65°C to 165°C  
Table-3 Recommended Operation Conditions  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
VDD  
Power Supply  
3.0  
2
3.3  
3.6  
3.0  
0.8  
3.8  
3.0  
85  
V
V
VIH  
VIL  
High Level Input Voltage  
Low Level Input Voltage  
0
V
Voltage at any Bus Terminal  
Magnitude of Differential Input Voltage  
Ambient Operating Temperature  
-1.4  
0.05  
-40  
V
V
TA  
°C  
Electrical Specification  
10  
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
3.2 LVTTL DRIVER/RECEIVER CHARACTERISTICS  
3.2.1 M-LVDS TO LVTTL  
Table-4 LVTTL DC Parameters  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
VIHL  
VILL  
IILL  
Input High Level  
Input Low Level  
2.0  
-0.3  
-1.0  
2.4  
VDD + 0.3  
0.8  
V
V
Input Leakage Current  
Output High Voltage  
Output Low Voltage  
1.0  
µA  
V
VOHL  
VOLL  
Output Current = 17 mA, VDD = 3 V  
Output Current = 12 mA, VDD = 3 V  
0.4  
V
Table-5 LVTTL AC Parameters  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
tr  
tf  
Rise Time  
Fall Time  
Frequency  
Cload = 15 pF, 10% - 90%  
Cload = 15 pF, 10% - 90%  
1.2  
1.2  
ns  
ns  
fML  
166  
MHz  
OUT  
VOUT  
15 pF  
VA  
1.2 V  
VB  
1.0 V  
VID  
0.2 V  
0 V  
-0.2 V  
tpHL  
tpLH  
VO  
VOH  
VOL  
90%  
10%  
tf  
tr  
Figure-3 LVTTL Output Test Circuit and Waveforms  
Electrical Specification  
11  
May 18, 2006  
 
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
3.3 M-LVDS DRIVER TYPE-1 RECEIVER CHARACTERISTICS  
Table-6 M-LVDS Type-1 Receiver Input Threshold Test Voltages  
Applied Voltages  
Resulting Differential Input Voltage  
Resulting Common-mode Input Voltage  
Receiver Output(1)  
VA  
VB  
2.400  
0.000  
3.425  
3.375  
-0.975  
-1.025  
0.000  
2.400  
3.375  
3.425  
-1.025  
-0.975  
2.400  
-2.400  
0.050  
-0.050  
0.050  
-0.050  
1.200  
1.200  
3.4  
High  
Low  
High  
Low  
High  
Low  
3.4  
-1  
-1  
1. The receiver is enabled ( The RE_EN pin is pulled low).  
Electrical Specification  
12  
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
Table-7 M-LVDS DC Parameters  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
VODM  
Differential Output Voltage  
480  
-50  
650  
50  
mV  
mV  
∆VODM  
Change in VODM for Complimentary Output States,  
∆VODM = |VODM1 - VODM0  
|
VOSM  
∆VOSM  
VOSM(p-p)  
IOM  
Offset Voltage  
0.8  
-50  
1.2  
50  
V
Change in VOSM for Complimentary Output States  
Peak-to-peak Common-mode Output Voltage  
Output Short Circuit Current  
mV  
mV  
mA  
µA  
mV  
150  
20  
IIZM  
High Impedance Input Current  
-10  
50  
10  
VTHM  
Differential Input High Threshold  
Type-1  
Type-1  
VTLM  
Differential Input Low Threshold  
-50  
mV  
VCMM  
IINM  
Input Common-mode Range  
Input Current  
VINA - VINB = 200 mV  
-1  
3.4  
20  
V
Input Voltage = 0 V to 2.4 V  
-20  
µA  
24.9 Ω  
24.9 Ω  
∆VOSM  
M_A  
M_B  
VOSM(p-p)  
VODM  
VOSM  
VOSM  
VAB  
0 V  
VODM0  
VODM1  
Figure-4 M-LVDS Driver Output Voltage Test Circuit  
Electrical Specification  
13  
May 18, 2006  
 
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
M_A  
M_B  
High or Low Steady  
State Logic Input  
+
-
VTEST  
- 1 V to 3.4 V  
Figure-5 M-LVDS Driver Short-Circuit Test Circuit  
10 kΩ  
10 kΩ  
M_A  
OUT_A  
VOUT  
M-LVDS Interface  
LVTTL Interface  
OUT_B  
M_B  
+
VTEST  
-
-1 V to 3.4 V  
1 µF  
1 µF  
0 ~ 166 MHz  
Figure-6 M-LVDS Type-1 Receiver Input Common-mode Range Test Circuit  
Electrical Specification  
14  
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
Table-8 M-LVDS Input Current Parameters  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
IA  
Receiver or Transceiver with Driver Disabled Input Current  
VA = 3.8 V, VB = 1.2 V  
VA = 0 V or 2.4 V, VB = 1.2 V  
0
32  
20  
0
µA  
-20  
-32  
0
VA = - 1.4 V, VB = 1.2 V  
IB  
Receiver or Transceiver with Driver Disabled Input Current  
VB = 3.8 V, VA = 1.2 V  
32  
20  
0
µA  
VB = 0 V or 2.4 V, VA = 1.2 V  
-20  
-32  
-4  
VB = -1.4 V, VA = 1.2 V  
IAB  
Receiver or Transceiver with Driver Differential Current (IA - IB)  
Receiver or Transceiver Power-off Input Current  
VA = VB, -1.4 V < VA < 3.8 V  
4
µA  
µA  
IA(OFF)  
VA = 3.8 V, VB = 1.2 V, 0 V < VDD < 1.5 V  
VA = 0 or 2.4 V, VB = 1.2 V, 0 V < VDD < 1.5 V  
VA = -1.4 V, VB = 1.2 V, 0 V < VDD < 1.5 V  
VB = 3.8 V, VA = 1.2 V, 0 V < VDD < 1.5 V  
VB = 0 or 2.4 V, VA = 1.2 V, 0 V < VDD < 1.5 V  
VB = -1.4 V, VA = 1.2 V, 0 V < VDD < 1.5 V  
0
32  
20  
0
-20  
-32  
0
IB(OFF)  
Receiver or Transceiver Power-off Input Current  
32  
20  
0
µA  
-20  
-32  
-4  
IAB(OFF) Receiver or Transceiver Power-off Differential Input Current (IA - IB) VA = VB, 0 V < VDD< 1.5 V, -1.4 V < VA < 3.8 V  
4
µA  
pF  
CAB  
Transceiver with driver disabled differential input capacitance  
VAB = 0.4 sin (30E6πt) V  
4
M_A  
M_B  
V
A
V
B
Figure-7 Various Input Currents Test Circuit  
Electrical Specification  
15  
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
Table-9 M-LVDS AC Parameters  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ  
Max.  
Unit  
tr  
tf  
Rise Time  
Fall Time  
10% - 90%  
10% - 90%  
0.8  
0.8  
1.5  
1.5  
ns  
ns  
tTSL  
fML  
Differential Skew, tTSL = {tTSL1, tTSL2  
Frequency  
}
-100  
100  
166  
ps  
MHz  
VA  
tTSL1  
tTSL2  
VB  
Figure-8 Differential Skew  
3.32 kΩ  
M_A  
50 Ω  
VODM  
+
VTEST  
-1 V to 3.4 V  
-
M_B  
3.32 kΩ  
Figure-9 M-LVDS Output Voltage Test Circuit  
Electrical Specification  
16  
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
Table-10 M-LVDS Type-1 Receiver AC Parameters  
Output mode  
Symbol  
Parameter  
Test Condition  
Min  
Typ Max Unit  
LVTTL  
tpLH  
tpHL  
Delay, Low to High Level  
Delay, High to Low Level  
Pulse Skew, tsk = |tpLH - tpHL  
Rise Time  
Input clock: freq = 50 MHz, Impedance  
= 150 Ω, Voltage = -200 mV - 200 mV.  
See Figure-3  
2.5  
2.5  
5.5  
5.5  
6.5  
6.5  
300  
2.4  
2.4  
7
ns  
ns  
ps  
ns  
ns  
ps  
ps  
tsk  
Type-1  
|
100  
Tr (10% - 90%)  
Tf (10% - 90%)  
Tjit(per)  
1
1
Fall Time  
Period jitter, rms(1 standard deviation)  
Output to Output Skew  
4
200  
Table-11 M-LVDS Driver AC Parameter  
Symbol  
Parameter  
Test Condition  
Min Typ Max Unit  
tpLH  
tpHL  
LVTTL input  
Tr (10% - 90%)  
Delay, Low to High Level  
Input clock: freq = 15 MHz, Tr = Tf = 1.2 ns,  
Impedance = 300 Ω, Voltage = 0 V - 3.3 V. See  
2.5  
2.5  
3.7  
3.7  
40  
1.1  
1.1  
2
5.5  
5.5  
100  
1.5  
1.5  
3
ns  
ns  
ps  
ns  
ns  
ps  
ps  
Delay, High to Low Level  
Figure-4  
Tsk  
Pulse Skew, tsk = |tpLH - tpHL  
Rise Time  
|
0.7  
0.7  
Tf (10% - 90%)  
Tjit(per)  
Fall Time  
Period jitter, rms(1 standard deviation)  
Output to Output Skew  
100  
Input  
tpLH  
tpHL  
Vs  
0.8Vs/0.9Vs  
Output  
0.2Vs/0.1Vs  
tf  
0 Vs  
tr  
Figure-10 Timing and Voltage Definitions for the Output Signal  
Electrical Specification  
17  
May 18, 2006  
IDT5V5201  
Single Channel Type-1 M-LVDS to LVTTL Transceiver  
ORDERING INFORMATION  
XXXXXXX  
Device Type  
XX  
X
IDT  
Process/  
Temperature  
Range  
I
Industrial (-40 °C to +85 °C)  
DCG  
Green Small Outline Integrated Circuit (SOIC, DCG8)  
5V5201 Single Channel Type-1 M-LVDS to LVTTL Transceiver  
CORPORATE HEADQUARTERS  
6024 Silver Creek Valley Road  
San Jose, CA 95138  
for SALES:  
1-800-345-7015 or 408-284-8200  
fax: 408-284-2775  
for Tech Support:  
408-360-1552  
email:TELECOMhelp@idt.com  
www.idt.com  
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.  
18  
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