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UX2105

型号：

UX2105

描述：

155Mbps的限幅放大器>155Mbps的限幅放大器（主放大器或者后置放大器）[ 155Mbps Limiting Amplifier 155Mbps 限幅放大器（主放大器或者后置放大器） ]

品牌：

ETC[ ETC ]

页数：

5 页

PDF大小：

194 K

下载PDF手册
UX 2105  
155Mbps Limiting Amplifier  
—
—
Alarm Level Compatible with PECL, TTL and  
CMOS Level  
General Description  
The UX2105 is a high gain limiting amplifier  
designed for SDH/SONET fiber optical receiver  
systems, accepting a wide range of input AC  
voltages and providing constant-amplitude  
voltage swings with some temperature  
compensation. It integrates a signal detector,  
with programmable LOS threshold, an optional  
output disable function and automatic squelch  
function. It is available in TSSOP 16-pin  
packages.  
Pin Compatible with the Mindspeed  
MC2045 and MAXIM MAX3645  
Pin Configuration  
Features  
—
—
+3.3V or +5V Power Supply  
1mV Differential Input Sensitivity  
(BER=10-10)  
—
OUTP/OUTN are CMOS Configuration,  
Simply AC-coupling  
Figure 1. Pin Configuration TSSOP 16  
Typical Application Circuit  
Figure 2. Typical Application Circuit  
1
2007 Preliminary Datasheet  
www.uxfastic.com  
UX 2105  
155Mbps Limiting Amplifier  
Pin Description  
Pin No. Name  
Function  
Auto-zero capacitor pin. A capacitor connected between this pin and AZ2 sets the  
time constant of the offset correction loop. The offset correction is disabled when  
the AZ1 and AZ2 pins are shorted together.  
1
AZ1  
See AZ1.  
2
3
4
5
6
7
AZ2  
GNDA  
INP  
Analog Supply Ground. Must be at same potential as GNDE pin.  
Positive data input  
Negative data input  
INN  
Analog Supply Voltage. Must be at the same potential as the VCCE pin.  
VCCA  
CF  
Level-detect filter capacitor pin. Connect a capacitor between this pin and VCCA.  
The squelch function is disabled when JAM is connected to ground. The automatic  
squelch function is enabled when JAM is connected to the LOSP.  
8
JAM  
Positive Loss-of-Signal output, CMOS level, compatible with PECL and TTL. LOSP is  
low when the level of the input signal is above the preset threshold set by the VSET  
input. LOSP is high when the signal level drops below the threshold. Normally  
connected to JAM pin to enable automatic squelch function to operate.  
Negative Loss-of-signal output, CMOS level, compatible with PECL and TTL. LOSN is  
high when the level of the input signal is above the preset threshold set by the VSET  
input. LOSN is low when the signal level drops below the threshold. Indicates Input  
signal level status.  
9
LOSP  
10  
LOSN  
Digital Supply Ground. Must be the same potential as the GNDA pin.  
11  
12  
13  
14  
GNDE  
OUTN  
OUTP  
VCCE  
Negative data output, the output buffer is CMOS structure.  
Positive data output, the output buffer is CMOS structure.  
Digital Supply Voltage. Must be at the same potential as the VCCA pin.  
5V to 3V conversion output pin.No connection or can connect a capacitor between  
this pin and GND.  
V3V  
15  
Loss-of-Signal Threshold Pin. Resistor (RSET) to ground sets the LOS threshold. This  
pin can be left open if the LOS detect function is not required and JAM is connected  
to ground, otherwise connect VSET to ground.  
16  
VSET  
Absolute Maximum Ratings  
Symbol  
VCC  
Parameter  
Rating  
6
Units  
V
Power supply(Note 1)  
Operating ambient  
Storage temperature  
TA  
-40 to +85  
-65 to +150  
°C  
TSTG  
°C  
2
2007 Preliminary Datasheet  
www.uxfastic.com  
UX 2105  
155Mbps Limiting Amplifier  
Recommended Operating Conditions  
Symbol  
VCC  
Parameter  
Power supply(Note 1)  
Operating ambient  
Rating  
3.0 to 5.5  
-40 to +85  
Units  
V
TA  
°C  
Note 1: Related to Ground  
DC Characteristics  
Symbol  
Parameter  
Min  
Typ  
Max  
Units  
μV  
VOS  
VTH  
Equivalent input Offset Voltage  
LOS Sensitivity Range  
50  
20  
4
2
1
mVP-P  
dB  
HYS  
LOS Hysteresis (Note 2)  
2
ICC  
Power-Supply Current (Note 3)  
43.5  
mA  
Note 2: Optical, 10log (VDEASSERT/VASSERT).  
Note 3: LOSN is at CMOS level, no load terminated to the outputs, with I/O current in the output buffer.  
AC Characteristics  
(VCC=+3.0V to +5.5V, Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.)  
Symbol  
Parameter  
Min  
Typ  
242  
169  
21  
Max  
Units  
BW  
Input Bandwidth@upper -3dB point: Gain>70dB  
190  
MHz  
CAZ = open  
Low-Frequency Cutoff  
CAZ = 0.1μF  
FLFC  
KHz  
mV  
Single ended  
Input signal voltage  
0.5  
1
800  
1600  
880  
VIN  
Differential  
VAMP  
RIN  
Output Amplitude (Note 4)  
Input Resistance  
600  
mV  
KΩ  
pF  
ps  
20  
CIN  
Input Capacitance  
2
TR,TF  
TPWD  
TLOS  
Data Output Transition Time (Note 5)  
Pulse-Width Distortion(Note 6)  
LOS Assert/Deassert Time  
600  
100  
1000  
300  
100  
ps  
μs  
Note 4: Single ended; the output buffer is CMOS structure, shown in Figure3.  
Note 5: 20% to 80%  
Note 6: TPWD= [(width of wider pulse)-(width of narrower pulse)]/2.  
3
2007 Preliminary Datasheet  
www.uxfastic.com  
UX 2105  
155Mbps Limiting Amplifier  
Applications Information  
CMOS Output Buffer  
CMOS structure, please refer to Figure3. Current  
sources are integrated internal in the output  
buffer circuit. Different from PECL output, no 50Ω  
to (VCC-2V) termination here. The output  
common mode voltage is at half of VCC. The  
current flows through the chip partly from the  
current sources, so it corresponds to that of other  
similar products with ECL load. AC coupling is  
required at OUTN and OUTP, and the external  
capacitors are employed to insulate the DC level  
with external circuits, as shown in Typical  
Application Circuit.  
Figure 3. Output Buffer Circuit  
terminated by a pull up resistor (4.7～10KΩ), see  
Figure4, it compatible with TTL level; When  
terminated by 50Ω to (VCC-2V), see Figure5, it  
compatible with PECL level. The corresponding  
logic states list in table LOS Level Status.  
LOS Output Terminations  
In UX2105, the LOS interface operates three logic  
states with different termination techniques  
respectively. When LOSN is connected directly to  
external circuits, it operates CMOS level; When  
Figure 4. Equivalent TTL Termination Circuit  
at LOSN  
Figure 5. Equivalent PECL Termination  
Circuit at LOSN  
4
2007 Preliminary Datasheet  
www.uxfastic.com  
UX 2105  
155Mbps Limiting Amplifier  
LOS level status  
Logic State  
High  
CMOS  
VCC  
PECL  
TTL  
VCC  
VCC-0.9V  
VCC-2.2V  
Low  
Ground  
Ground to 0.5V  
Package Outline  
Details of ‘A’ part  
Figure 6. TSSOP16 Package  
www.uxfastic.com  
5
2007 Preliminary Datasheet  
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