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IXD611P1

型号：

IXD611P1

描述：

600V 600 mA高侧和低侧驱动器[ 600V, 600 mA High and Low-side Driver ]

品牌：

IXYS[ IXYS CORPORATION ]

页数：

14 页

PDF大小：

278 K

下载PDF手册
IXD611  
IXD611  
600V, 600 mA High & Low-side Driver  
for N-Channel MOSFETs and IGBTs  
Features  
General Description  
• Floating High Side Driver with boot-strap Power  
supply along with a Low Side Driver.  
• Fully operational to 600V  
The IXD611, with its two inputs referenced to ground, has high  
speed low side and high side gate ouptuts to drive either a pair  
of N-channel MOSFETs or IGBTs in a half-bridge totem pole  
configuration. The High Side driver can control a MOSFET or  
IGBT connected to a positive high voltage up to 600V. The logic  
input stages are compatible with TTL or CMOS, have built-in  
hysteresis and are fully immune to latch up over the entire  
operating range. The IXD611 can withstand dV/dt on the output  
side up to ± 50V/ns.  
• ± 50V/ns dV/dt immunity  
• Gate drive power supply range: 10 - 35V  
• Undervoltagelockoutforbothoutputdrivers  
• Outputs are in phase with inputs  
• Built using the advantages and compatibility  
of CMOS and IXYS HDMOSTM processes  
• Latch-Up protected over entire  
operating range  
• High peak output current: ± 600 mA  
• Matched propagation delay for both outputs  
• Lowoutputimpedance  
The IXD611 comes in either the 8-PIN PDIP (IXD611P1), 8-PIN  
SOIC (IXD611S1), 14-PIN PDIP (IXD611P7), or the 14-PIN  
SOIC (IXD611S7) packages.  
• Low power supply current  
•Immunetonegativevoltagetransients  
Ordering Information  
Part Number  
PackageType  
IXD611P1  
IXD611P7  
IXD611S1  
IXD611S7  
8-PIN DIP  
14-PIN DIP  
8-PIN SOIC  
14-PIN SOIC  
Applications  
• Driving MOSFETs and IGBTs in half-bridge circuits  
• High voltage, high side and low side drivers  
• Motor Controls  
• Switch Mode Power Supplies (SMPS)  
• DC to DC Converters  
• Class D Switching Amplifiers  
Warning: The IXD611 is ESD sensitive.  
Figure 1A. Typical Circuit for IXD611P7/S7  
Figure 1B. Typical Circuit for IXD611P1/S1  
Up to 600V  
Up to 600V  
HGO  
HGO  
VCH  
VCL  
VCH  
VCL  
VCC  
HIN  
LIN  
VCC  
HIN  
LIN  
To Load  
To Load  
HIN  
LIN  
HS  
HIN  
HS  
LIN  
LS  
LGO  
LGO  
LS  
GND  
DG  
GND  
© 2007 IXYS CORPORATION All rights reserved  
DS99198A(10/07)  
1
First Release  
IXD611  
Figure 2. IXD611 Functional Block Diagram  
Pin Description And Configuration  
SYMBOL  
VCL  
HIN  
LIN  
DG  
FUNCTION  
Supply Voltage Low side power supply.  
HS Input  
LS Input  
Ground  
DESCRIPTION  
High side Input signal, TTL or CMOS compatible; HGO in phase  
Low side Input signal, TTL or CMOS compatible; LGO in phase  
Logic reference ground (Not available for IXD611P1, IXD611S1)  
VCH  
HGO  
HS  
LGO  
LS  
Supply Voltage High side floating power supply, referenced to HS  
Output  
Return  
Output  
Ground  
High side driver output  
High side floating ground  
Low side driver output  
Low side ground  
IXYS reserves the right to change limits, test conditions, and dimensions.  
2
IXD611  
Figure 3A. Pin configuration for IXD611P1 (8 pin DIP) and IXD611S1 (8 pin SOIC)  
VCH  
1
2
VCL  
8
1
VCL  
VCH  
8
7
HGO  
HS  
2
HIN  
LIN  
7
6
5
HIN  
HGO  
HS  
LIN  
LS  
6
5
3
4
3
LGO  
4
LGO  
LS  
8 pin DIP  
8 pin SOIC  
Figure 3B. Pin configuration for IXD611P7 (14 pin DIP) and IXD611S7 (14 pin SOIC)  
NC  
VCL  
HIN  
VCL  
HIN  
14  
13  
12  
11  
10  
9
NC  
VCH  
HGO  
HS  
1
2
3
4
5
1
14  
13  
12  
11  
10  
9
VCH  
HGO  
2
LIN  
NC  
LIN  
NC  
3
4
HS  
NC  
DG  
DG  
NC  
5
6
7
LS  
NC  
NC  
LS  
NC  
6
7
LGO  
NC  
8
LGO  
8
14 pin DIP  
14 pin SOIC  
© 2007 IXYS CORPORATION All rights reserved  
3
IXD611  
Absolute Maximum Ratings  
Symbol  
Definition  
Min  
Max  
Units  
VHS  
High side floating supply offset voltage  
-200  
650  
V
V
V
V
V
V
V
VCH  
VHGO  
VCL  
Highsidefloatingabsolutevoltage  
Highsidefloatingoutputvoltage  
Low side fixed supply voltage  
Lowsideoutputvoltage  
-0.3  
VHS - 0.3  
-0.3  
35  
VCH + 0.3  
35  
VLGO  
VDG  
VIN  
-0.3  
VCL + 0.3  
VLS + 0.7  
VCL + 0.3  
Logic supply offset voltage (P7, S7 only)  
Logic input voltage(HIN & LIN)  
VLS - 0.7  
LS - 0.3  
dVHS/dt  
PD  
Allowableoffsetsupplyvoltagetransient  
50  
1.0  
V/ns  
W
Package power dissipation@ TA ≤ 25C  
8 pin PDIP  
8 pin SOIC  
14 pin PDIP  
14 pin SOIC  
0.625  
1.6  
W
W
1.0  
W
RTHJA  
Thermal resistance, junction-to-ambient 8 pin PDIP  
8 pin SOIC  
125  
200  
75  
oC/W  
oC/W  
oC/W  
oC/W  
oC  
14 pin PDIP  
14 pin SOIC  
120  
150  
150  
300  
TJ  
TS  
JunctionTemperature  
Storagetemperature  
-55  
oC  
T
Leadtemperature(soldering, 10s)  
oC  
L
Recommended Operating Conditions  
Symbol  
Definition  
Min  
-200  
10  
Max  
600  
30  
Units  
V
VHS  
High side floating supply offset voltage  
Highsidefloatingsupplyabsolutevoltage  
Highsidefloatingoutputvoltage  
Low side fixed supply voltage  
Lowsideoutputvoltage  
VCH  
V
VHGO  
VCL  
VHS  
VCH  
V
10  
30  
V
VLGO  
VDG  
0
VCL  
V
Logic supply offset voltage (P7, S7 only)  
Logic input voltage(HIN, LIN)  
AmbientTemperature  
VLS - 0.3  
VDG or LS  
-40  
VLS + 0.3  
VCL  
V
VIN  
V
TA  
125  
oC  
IXYS reserves the right to change limits, test conditions, and dimensions.  
4
IXD611  
Dynamic Electrical Characteristics  
Symbol Definition  
TestConditions  
Min  
Typ  
Max Units  
ton  
toff  
tr  
Turn-on propagation delay  
Turn-off propagation delay  
Turn-on rise time  
VCL= VCH = 15V, CLOAD= 1nF  
180  
200  
190  
35  
ns  
ns  
ns  
ns  
ns  
VCL= VCH = 15V, CLOAD= 1nF  
VCL= VCH = 15V, CLOAD= 1nF  
VCL= VCH = 15V, CLOAD= 1nF  
CLOAD= 1nF  
170  
28  
tf  
Turn-off fall time  
18  
25  
tdm  
Delay matching, HS & LS turn-on/off  
10  
20  
Static Electrical Characteristics  
Symbol  
Definition  
TestConditions  
Min  
Typ  
Max Units  
VINH  
Logic “1” input voltage  
VCL = VCH= 15V  
2.7  
V
VINL  
Logic “0” input voltage  
VCL= VCH = 15V  
IO = 20mA  
2.4  
0.3  
V
V
VHLGO // VHHGO High level output voltage,  
VCH-VHGO or VCL-VLGO  
0.22  
0.16  
VLLGO // VLHGO Low level output voltage,  
VHGO or VLGO  
IO = 20mA  
0.25  
V
IHL  
HS to LS bias current.  
VHS = 600V  
0.12  
0.7  
0.18  
11  
0.2  
0.8  
0.3  
20  
2
mA  
mA  
mA  
uA  
uA  
V
IQHS  
IQLS  
IIN+  
Quiescent VCH supply current  
Quiescent VCL supply current  
Logic “1” input bias current  
Logic “0” input bias current  
VCH= 15V VIN= 0V or VIN = 5 V  
VCL= 15V VIN= 0V or VIN = 5 V  
VIN = VSUPPLY = 15V  
VIN = 0V  
IIN-  
1
VCHUV  
VCHUV  
+
-
VCH supply undervoltage positive going threshold.  
VCH supplyundervoltagenegativegoingthreshold.  
VCL supply undervoltage positive going threshold  
VCL supply undervoltage negative going threshold.  
7.5  
7
8
8.5  
8
7.3  
8
V
VCLUV  
VCLUV  
+
-
7.5  
7
8.5  
8
V
7.5  
0.6  
0.6  
-0.6  
V
VCHUVH, VCLUVH Undervoltage Hysteresis  
0.3  
V
IGO  
IGO  
+
-
HS or LS Output high short circuit current; VGO= 15V, VIN= 5V, PW<10us 0.5  
HS or LS Output low short circuit current; VGO= 15V, VIN= 0V, PW<10us  
A
-0.5  
A
Precaution : When performing the high voltage tests, adequate safety precautions should be taken.  
© 2007 IXYS CORPORATION All rights reserved  
5
IXD611  
Timing Waveform Definitions  
Figure4.INPUT/OUPUTTimingDiagram  
50%  
50%  
50  
%
tr  
50%  
HIN  
HIN  
LIN  
LIN  
tdoff  
tf  
tdon  
90%  
tdm  
90%  
90%  
LGO  
HGO  
10%  
LGO  
HGO  
HGO  
LGO  
tdm  
10%  
10%  
Outgoing Signal  
Figure 5. Definitions of Switching Time Waveforms  
Figure 6. Definitions of Delay Matching Waveforms  
600V  
500V  
400V  
~
~
~
~
0
100kHz 300kHz  
1MHz  
fPWM  
Figure 7. Device operating range: Buss voltage vs. Frequency  
Tested in typical circuit configuration (refer to Figure 9 & 10)  
IXYS reserves the right to change limits, test conditions, and dimensions.  
6
IXD611  
10V  
DC_DC Boost  
Vout+  
10V  
100uF 25V  
Low ESR  
10uF  
Low ESR  
NDY1215C  
Up to 600V  
Vout-  
GND  
1.5k 2W  
15V  
VCL  
VCH  
HGO Out  
1nF  
HGO  
HIN  
TX 30:1  
20uF  
1kV  
10x0.1uF  
1kV  
HS  
IXD611  
50  
N/C  
LGO  
LIN  
10uF  
0.1uF  
LS  
Measure dV/dt  
dv/dt slope adjustment  
Drive Input  
IXDN414  
100 ohm  
multi turn  
Figure 8. Test circuit for allowable offset supply voltage transient.  
1
VCL  
VIN+  
Up to 500V  
3
1
IXCP  
10M90S  
10  
11  
12  
15  
1k  
VOUT-  
VOUT+  
GND  
VOUT-  
VOUT+ 14  
2
1uF/35V MLCC  
30  
5.1  
1N5817  
1uF/35V MLCC  
10uF/35V  
15  
IXTH14N60P  
18uH  
1
8
VCL  
HIN  
LIN  
LS  
VCH  
VCL  
HIN  
LIN  
1k  
1k  
2
3
7
HGO  
HS  
LGO  
0.1uF/1kV  
6
5
4
5.1  
1N5817  
0.47uF  
0.47uF  
IXTH14N60P  
15  
Figure 9. Test circuit for high frequency, 750kHz, operation.  
VCH, VCL = 15V  
© 2007 IXYS CORPORATION All rights reserved  
7
IXD611  
1
VCL  
VIN+  
Up to 600V  
3
1
IXCP  
10M90S  
10  
11  
12  
15  
VOUT-  
VOUT+ 14  
1k  
VOUT-  
VOUT+  
GND  
2
1uF/35V MLCC  
30  
5.1  
1N5817  
1uF/35V MLCC  
10uF/35V  
51  
IXTH14N60P  
1
2
3
8
VCL  
HIN  
LIN  
LS  
VCH  
HGO  
HS  
LGO  
VCL  
HIN  
LIN  
1k  
1k  
7
0.1uF/1kV  
6
5
4
5.1  
1N5817  
51  
IXTH14N60P  
Figure 10. Test circuit for low frequency, 75kHz, operation.  
VCH, VCL = 15V  
IXYS reserves the right to change limits, test conditions, and dimensions.  
8
IXD611  
Fig.12  
Fig. 11  
Fall Times vs. Supply Voltage  
Rise Times vs. Supply Voltage  
25  
40  
35  
30  
25  
20  
15  
10  
5
20  
15  
10  
5
1000 pF  
1000 pF  
100 pF  
100 pF  
0
0
0
0
5
10  
15  
20  
25  
30  
35  
40  
5
10  
15  
20  
25  
30  
35  
40  
Supply Voltage (V)  
Supply Voltage (V)  
Fig. 14  
Fig. 13  
Rise / Fall Times vs. Temperature  
VIN = VSUPPLY = 15V CLOAD = 1000pF  
Propagation Delay vs. Supply Voltage  
C = 1000pF V = VSUPPLY  
L
IN  
40  
35  
30  
25  
20  
15  
10  
5
260  
240  
220  
200  
180  
160  
140  
120  
Rise  
Low side positivegoing  
Low side negative going  
Fall  
High side positive going  
High side negative going  
100  
0
0
5
10  
15  
20  
25  
30  
35  
40  
-50  
0
50  
100  
150  
Supply Voltage (V)  
Temperature (C)  
Fig. 16  
Fig.15  
Propagation Delay vs. Temperature  
VIN = VSUPPLY = 15V CLOAD = 1000pF  
Under Voltage Lock Out vs. Temperature  
10  
9.5  
9
190  
185  
180  
175  
170  
165  
160  
155  
150  
Pos. going supply voltage  
Neg. going supply voltage  
8.5  
8
Pos. going input  
7.5  
7
Neg. going input  
6.5  
6
5.5  
5
-100  
-50  
0
50  
100  
150  
-100  
-50  
0
50  
100  
150  
Temperature (C)  
Temperature (C)  
© 2007 IXYS CORPORATION All rights reserved  
9
IXD611  
Fig. 17  
Fig. 18 Input Threshold Level vs. Temperature  
VSUPPLY = 15V  
Input Threshold Level vs. Supply Voltage  
4.5  
4
4
3.5  
3.5  
3
3
Pos. going input  
Positve going  
2.5  
Neg. going input  
2
2.5  
2
Negative going  
1.5  
1
1.5  
1
0.5  
0
0.5  
0
-50  
0
50  
100  
150  
0
5
10  
15  
20  
25  
30  
35  
40  
Temperature (C)  
Supply Voltage (V)  
Fig.19  
Fig. 20  
Quiescent Current vs. Temperature  
VIN = "0" VSUPPLY = 15V Both Drivers Combined  
Quiescent Supply Current vs. Supply Voltage  
V = "0"  
0.57  
0.56  
0.55  
0.54  
0.53  
0.52  
0.51  
0.5  
IN  
1.2  
1
0.8  
0.6  
0.4  
0.2  
0
High side  
Low side  
0.49  
0.48  
0
5
10  
15  
20  
25  
30  
35  
40  
-50  
0
50  
100  
150  
Supply Voltage (V)  
Temperature (C)  
Fig.21  
Fig.22  
LIN / HIN Bias Current vs. Temperature  
VSUPPLY = 15V  
LIN / HIN Bias Current vs. Supply Voltage  
VIN = Supply Voltage  
30  
25  
20  
15  
10  
5
16  
14  
12  
10  
8
VIN = 15V  
Logic "1" either input pin  
6
VIN = 5V  
4
Logic "0" 2uA  
max.  
2
0
0
0
5
10  
15  
20  
25  
30  
35  
40  
-50  
0
50  
100  
150  
Supply Voltage (V)  
Temperature (C)  
IXYS reserves the right to change limits, test conditions, and dimensions.  
10  
IXD611  
Fig. 23  
Fig. 24  
High Level Ouput Voltage vs. Supply Voltage  
Io = 20mA  
Low Level Output Voltage vs. Supply Voltage  
Io = 20mA  
200  
180  
160  
140  
120  
100  
80  
300  
250  
200  
150  
100  
50  
Low Side  
High Side  
Low Side  
High Side  
60  
40  
20  
0
0
0
5
10  
15  
20  
25  
30  
35  
0
5
10  
15  
20  
25  
30  
35  
Supply Voltage (V)  
Output Sink Current vs. Supply Voltage  
Supply Voltage (V)  
Output Source Current vs. Supply Voltage  
Fig. 25  
Fig. 26  
0
2
1.8  
1.6  
1.4  
1.2  
1
-0.2  
-0.4  
-0.6  
-0.8  
-1  
0.8  
0.6  
0.4  
0.2  
0
-1.2  
-1.4  
-1.6  
0
5
10  
15  
20  
25  
30  
35  
40  
0
5
10  
15  
20  
25  
30  
35  
40  
Supply Voltage (V)  
Supply Voltage (V)  
Fig. 27  
Fig. 28  
Output Sink Current vs. Temeprature  
VSUPPLY = 15V  
Output Source Current vs. Temperature  
VSUPPLY = 15V  
0
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
-0.6  
-0.7  
-0.8  
-0.9  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
-50  
0
50  
100  
150  
-50  
0
50  
100  
150  
Temperature (C)  
Temperature (C)  
© 2007 IXYS CORPORATION All rights reserved  
11  
IXD611  
Fig. 29  
Fig. 30  
Supply Current vs. Supply Voltage  
LOAD = 100pF VIN = VSUPPLY 50% Duty Cycle  
Supply Current vs. Supply Voltage  
CLOAD = 1000pF VIN = VSUPPLY 50% Duty Cycle  
C
100  
100  
10  
1
2MHz  
1MHz  
2MHz  
1MHz  
10  
100KHz  
High side 100KHz  
Low side 100KHz  
High Side10KHz  
Low Side10KHz  
High side 10KHz  
1
Low side 10KHz  
0.1  
0.1  
0
5
10  
15  
20  
25  
30  
35  
40  
0
5
10  
15  
20  
25  
30  
35  
40  
Supply Voltage (V)  
Supply Voltage (V)  
Fig. 32  
Fig. 31  
High to Low Side Leakage Current vs. Temperature  
High To Low Side Leakage Current vs.High Side VOFFSET  
0.16  
VOFFSET = 600V VCL = VCH = 15V  
132  
0.14  
0.12  
0.1  
130  
128  
126  
124  
122  
120  
118  
116  
114  
0.08  
0.06  
0.04  
0.02  
0
0
100  
200  
300  
400  
500  
600  
700  
-50  
0
50  
100  
150  
High Side Offset Voltage (V)  
Temperature (C)  
Pulse Width Stability vs. Temperature  
VCL = VCH = 15V Input PW = 300ns  
Fig. 34  
Fig. 33  
Output Resistance vs. Supply Voltage  
14  
12  
10  
8
305  
300  
295  
290  
285  
280  
High Side  
High State / Low Side  
High State / High Side  
Low State / Low Side  
Low State / High Side  
6
Low Side  
4
2
0
-50  
0
50  
100  
150  
0
5
10  
15  
20  
25  
30  
35  
40  
Supply Voltage (V)  
Temperature (C)  
IXYS reserves the right to change limits, test conditions, and dimensions.  
12  
IXD611  
Fig. 35  
Fig. 36  
Normalized PW Out vs. PW In (Low Side)  
VIN = VSUPPLY = 10V, 20V, 30V CLOAD = 1000pF  
Normalized PW Out vs. PW In (High Side)  
VIN = VSUPPLY = 10V, 20V, 30V CLOAD = 1000pF  
1.2  
1.2  
10V  
20V  
1
0.8  
0.6  
0.4  
0.2  
0
1
0.8  
0.6  
0.4  
0.2  
0
30V  
0
50  
100  
150  
200  
250  
300  
350  
400  
0
50  
100  
150  
200  
250  
300  
350  
400  
Pulse Width In (ns)  
Pulse Width In (ns)  
© 2007 IXYS CORPORATION All rights reserved  
13  
IXD611  
IXD611S1 Package  
IXD611P1 Package  
IXD611S7 Package  
IXD611P7 Package  
INCHES  
MILLIMETERS  
SYM  
MIN  
MAX  
.069  
.010  
.020  
.010  
.344  
.157  
MIN  
1.35  
0.10  
0.33  
0.19  
8.55  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
8.75  
4.00  
.053  
.004  
.013  
.008  
.337  
.150  
A
14 13 12 11 10  
9
8
A1  
.050 BSC  
1.27 BSC  
.228  
.010  
.016  
0
.244  
.020  
.050  
8
5.80  
0.25  
0.40  
0
6.20  
0.50  
1.27  
8
1
2
3
6
7
4
5
NOTE: This drawing will meet all dimensions requirement of JEDEC MS-012 AB.  
IXYS Corporation  
IXYS Semiconductor GmbH  
3540 Bassett St; Santa Clara, CA 95054  
Tel: 408-982-0700; Fax: 408-496-0670  
e-mail: sales@ixys.net  
Edisonstrasse15 ; D-68623; Lampertheim  
Tel: +49-6206-503-0; Fax: +49-6206-503627  
e-mail: marcom@ixys.de  
www.ixys.com  
IXYS reserves the right to change limits, test conditions, and dimensions.  
14  
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