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VX-721

型号：

VX-721

描述：

单频HPLL VCXO[ Single Frequency HPLL VCXO ]

品牌：

VECTRON[ Vectron International, Inc ]

页数：

9 页

PDF大小：

716 K

下载PDF手册
VX-721  
Single Frequency HPLL VCXO  
VX-721  
Description  
Features  
Applications  
The VX-721 is a voltage controlled crystal oscillator, VCXO, based upon Vectron’s HPLL high performance phase locked loop frequency  
multiplier ASIC that combines key digital synthesis techniques with VI’s proven core analog technology blocks. A standard low frequency  
crystal provides the reference to the fractional-n synthesizer so that virtually any frequency between 10MHz and 1200 MHz can be factory  
programmed allowing quick turn manufacturing.  
Features  
Applications  
tꢀ Industry Standard Package, 5.0 x 7.0 x 1.8 mm  
tꢀ HPLL High Performance PLL ASIC  
tꢀ Jitter < 500 fs-rms (12 kHz to 20 MHz)  
tꢀ Output Frequencies from 10 MHz to 1200 MHz  
tꢀ Spurious Suppression, 70 dBc Typical  
tꢀ 2.5V or 3.3V Supply Voltage  
PLL circuits for clock smoothing and frequency translation  
Description  
tꢀ 1-2-4 Gigabit Fibre Channel  
tꢀ 10 Gigabit Fibre Channel  
tꢀ 10GbE LAN / WAN  
tꢀ Synchronous Ethernet  
tꢀ OC-192  
Standard  
INCITS 352-2002  
INCITS 364-2003  
IEEE 802.3ae  
ITU-T G.8262  
ITU-T G.709  
tꢀ LVCMOS, LVPECL or LVDS Output Configurations  
tꢀ Output Enable  
tꢀ SONET / SDH  
GR-253-CORE Issue4  
tꢀ Compliant to EC RoHS Directive  
Block Diagram  
VDD  
COutput  
Output  
LVCMOS  
LVPECL  
LVDS  
XTAL  
HPLL  
Vc  
OE  
Gnd  
Figure 1 - Block Diagram  
Page 1 of 9  
Rev2: 14 November 2012  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
VX-721 Single Frequency HPLL VCXO  
Performance Specificaꢀons  
Electrical Performance  
Symbol Min  
Supply  
VDD  
Parameter  
Test Conditions  
Typ  
Max  
Units  
V
Voltage1  
Current  
3.3V Option  
2.5V Option  
2.97  
2.25  
3.3  
2.5  
3.63  
2.75  
LVCMOS  
LVDS  
LVPECL  
-
-
-
90  
99  
120  
98  
108  
130  
IDD  
mA  
°C  
V
Operating Temperature1, 3  
Output Enable (OE)  
-40  
-
-
+85  
-
TOP  
VIH  
VIL  
0.75 x VDD  
-
-
0.5  
Frequency  
Nominal Frequency1  
LVPECL/LVDS  
LVCMOS  
10  
10  
-
-
1200  
160  
MHz  
fN  
Absolute Pull Range1, 2, 3  
Linearity2, 4  
VC = 0.1xVDD to 0.9xVDD  
20% to 80% full output  
APR  
Lin  
50  
-
-
-
-
ppm  
%
10  
Gain Transfer2,  
Temperature Stability1, 6  
10 to 90% of VDD  
TA = -40 to +85°C  
-
-
+100  
20  
-
-
ppm/V  
ppm  
KV  
fSTAB  
Outputs  
VO  
LVPECL Output  
mid-level  
VDD-1.42  
VDD-1.25  
V
-
-
swing (diff)  
mid-level  
VOD  
VO  
1.1  
1.4  
1.9  
1.8  
VPP  
V
LVDS Output  
1.6  
450  
-
swing (diff)  
VOD  
VOH  
300  
600  
VDD  
mVPP  
V
LVCMOS Output  
0.9 x VDD  
VOL  
-
-
0.1 x VDD  
V
Rise/Fall Time(20/80%)2,5  
Symmetry2,3  
LVPECL/LVDS  
LVCMOS with CL = 15 pF  
-
-
-
-
350  
1.2  
ps  
ns  
tR/tf  
LVPECL: VDD-1.3 V (diff)  
LVDS: 1.6 V (diff)  
SYM  
45  
50  
55  
%
LVCMOS:  
VDD/2  
Spurious Suppression6  
Jitter 6 (Performance Option N)  
Jitter 6 (Performance Option A)  
65  
-
70  
-
-
dBc  
12 kHz to 20 MHz  
12 kHz to 20 MHz  
фJ  
1000  
500  
fs-rms  
fs-rms  
фJ  
-
-
Control Voltage  
Input Impedance (Output Enabled)6  
Modulation Bandwidth  
500  
-
10.0  
-
-
-
kΩ  
kHz  
V
ZC  
BW  
VC  
-
Control Voltage Tuning Range  
0
VDD  
1] See Standard Frequencies and Ordering Information (Pg 8).  
2] Parameters are tested with production test circuit (See Figure 2 for LVCMOS, Figure 3 for LVPECL and figure 4 for LVDS).  
3] Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.  
4] Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310.  
5] Parameters are described with waveform diagram below (Figure 5).  
6] Not tested in production, guaranteed by design, verified at qualification.  
Page 2 of 9  
Rev2: 14 November 2012  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
VX-721 Single Frequency HPLL VCXO  
Test Circuits & Output Waveform  
+3.3V  
+3.3V  
10nF  
1nF  
10nF  
1nF  
VC  
VC  
1
2
3
6
5
4
1
2
3
6
5
4
10nF  
10nF  
NC  
OE  
OE  
Scope  
Scope  
39ꢀ  
10nF  
200ꢀ  
200ꢀ  
10kꢀ  
10kꢀ  
VMD  
10kꢀ  
10nF  
10nF  
VMD  
Figure 3 - LVPECL Production Test Circuit  
Figure 2 - LVCMOS Production Test Circuit  
+3.3V  
10nF  
VC  
tF  
tR  
1nF  
1
2
3
6
5
4
10nF  
10nF  
80%  
Vs  
OE  
Scope  
20%  
10kꢀ  
10kꢀ  
VMD  
On Time  
10nF  
Period  
Figure 4 - LVDS Production Test Circuit  
Figure 5 - Waveform Diagram  
Absolute Maximum Ratings  
Parameter  
Power Supply  
Input Current  
Output Current  
Symbol  
VDD  
Ratings  
0 to 3.8  
100  
Unit  
V
IIN  
mA  
mA  
V
IOUT  
25  
Voltage Control Range  
Output Enable  
VC  
0 to VDD  
0 to VDD  
-55 to 125  
260 / 40  
OE  
V
Storage Temperature  
TSTR  
°C  
Soldering Temperature / Duration  
TPEAK / tP  
°C / sec  
Page 3 of 9  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
Rev2: 14 November 2012  
VX-721 Single Frequency HPLL VCXO  
LVPECL Applicaꢀon Diagrams  
+3.3V  
+3.3V  
10nF  
1nF  
10nF  
1nF  
VC  
VC  
+3.3V  
1
2
3
6
5
4
1
2
3
6
5
4
130ꢀ  
82ꢀ  
130ꢀ  
82ꢀ  
10nF  
10nF  
10nF  
10nF  
OE  
OE  
240ꢀ  
240ꢀ  
Figure 6 - Single Resistor Terminaꢀon Scheme  
Figure 7 - Pull Up Pull Down Terminaꢀon  
Resistor values are typically 120 to 240 ohms for 3.3V operaꢀon and 82 to 120 ohms for 2.5V Resistor values are typically for 3.3V operaꢀon  
operaꢀon. For 2.5V operaꢀon, the resistor to ground is 62 ohms and the resistor to supply is 240 ohms  
There are numerous applicaꢀon notes on terminaꢀng and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 6,  
and a pull-up/pull-down scheme as shown in Figure 7. An AC coupling capacitor is opꢀonal, depending on the applicaꢀon and the input logic requirements of  
the next stage.  
One of the most important consideraꢀons is terminaꢀng the Output and Complementary Outputs equally. An unused output should not be leꢂ un-  
terminated, and if one of the two outputs is leꢂ open it will result in excessive jiꢁer on both. PC board layout must take this and 50 ohm impedance matching  
into account. Load matching and power supply noise are the main contributors to jiꢁer related problems.  
LVDS Applicaꢀon Diagrams  
+3.3V  
+3.3V  
10nF  
1nF  
10nF  
1nF  
VC  
VC  
1
2
3
6
5
4
1
2
3
6
5
4
10nF  
10nF  
Receiver  
100ꢀ  
Receiver  
OE  
OE  
100ꢀ  
Figure 8 - LVDS to LVDS, internal 100Ω  
Figure 9 - LVDS to LVDS, External 100Ω and AC block ing caps  
Some LVDS structures have an internal 100 ohm resistor on the  
input and do not need addiꢀonal components.  
One of the most important consideraꢀons is terminaꢀng the Output and Complementary Outputs equally. An unused output should not be leꢂ un-  
terminated, and if one of the two outputs is leꢂ open it will result in excessive jiꢁer on both. PC board layout must take this and 50 ohm impedance matching  
into account. Load matching and power supply noise are the main contributors to jiꢁer related problems.  
Page 4 of 9  
Rev2: 14 November 2012  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
VX-721 Single Frequency HPLL VCXO  
Typical Characteristics  
Figure 10 - Typical Phase Noise/Jitter Performance - INTEGER Mode  
Figure 11 - Typical VC Pull  
Page 5 of 9  
Rev2: 14 November 2012  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
VX-721 Single Frequency HPLL VCXO  
Reliability  
VI qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and IR reflow  
simulation. The VX-721 family is capable of meeting the following qualification tests:  
Environmental Compliance  
Parameter  
Mechanical Shock  
Mechanical Vibration  
Solderability  
Conditions  
MIL-STD-883, Method 2002  
MIL-STD-883, Method 2007  
MIL-STD-883, Method 2003  
MIL-STD-883, Method 1014  
MIL-STD-883, Method 2016  
IPC/JEDEC J-STD-020, MSL1  
Gross and Fine Leak  
Resistance to Solvents  
Moisture Sensitivity Level  
Handling Precautions  
Although ESD protection circuitry has been designed into the VX-721 proper precautions should be taken when handling and  
mounting. VI employs a human body model (HBM) and a charged-device model (CDM) for ESD susceptibility testing and design  
protection evaluation.  
ESD Ratings  
Model  
Minimum  
1000V  
Conditions  
MIL-STD-883, Method 3015  
Human Body Model  
Charged Device Model  
Machine Model  
900V  
JEDEC, JESD22-C101  
200 V  
JEDEC, JESD22-A115-A  
Reflow Profile (IPC/JEDEC J-STD-020)  
Parameter  
PreHeat Time  
Symbol  
Value  
60 sec Min, 180 sec Max  
tS  
RUP  
tL  
Ramp Up  
3 °C/sec Max  
Time Above 217 °C  
Time To Peak Temperature  
Time at 260 °C  
60 sec Min, 150 sec Max  
480 sec Max  
TAMB-P  
tP  
20 sec Min, 40 sec Max  
6 °C/sec Max  
Ramp Down  
RDN  
The device has been qualified to meet the JEDEC standard  
for Pb-Free assembly. The temperatures and time intervals  
listed are based on the Pb-Free small body requirements.  
The temperatures refer to the topside of the package,  
measured on the package body surface. The VX-721 device is  
hermetically sealed so an aqueous wash is not an issue.  
Terminal Plating: Electrolytic Ni > 1.9μm  
Electrolytic Au > 0.7μm  
Page 6 of 9  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
Rev2: 14 November 2012  
VX-721 Single Frequency HPLL VCXO  
Outline & Marking Diagram  
Suggested Pad Layout  
1.96  
3.66  
1.78  
Y = Year  
WW = Week  
C = Option Codes  
XXXMXXX = Frequency  
(See Ordering Info)  
2.54  
inch  
[mm]  
5.08  
Pin Out  
Output Enable  
Function  
Pin  
1
Symbol  
VC  
Function  
Control Voltage  
Output Enable1  
Case and Electrical Ground  
Output  
Option Symbol  
Result  
OE  
(3VDD/4) to VDD  
H
A
2
OE  
L
Gnd to 0.5 V  
OD  
3
GND  
H
(3VDD /4) to VDD  
Gnd to 0.5 V  
OD  
OE  
C
4
Output  
L
5
COutput  
(N/A for  
Complementary Output  
(N/C for LVCMOS)  
OD = Outputs Disabled  
OE = Outputs Enabled  
LVCMOS)  
6
Power Supply Voltage  
VDD  
Output Enable is internally pulled to VDD with a 30 kꢀ resistor. If  
option C is selected, OE must be pulled low by the user with a  
LVCMOS logic device or a 3 kꢀ resistor to ground.  
Tape & Reel (EIA-481-2-A)  
Tape Dimensions (mm)  
Reel Dimensions (mm)  
Dimension  
Tolerance  
VX-721  
W
Typ  
16  
F
Do  
Typ  
1.5  
Po  
Typ  
4
P1  
Typ  
8
A
B
C
Typ  
13  
D
N
Min  
50  
W1  
Typ  
16.4  
W2  
Max  
22.4  
# Per  
Reel  
Typ  
7.5  
Typ  
178  
Min  
1.5  
Min  
20.2  
200  
Page 7 of 9  
Rev2: 14 November 2012  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
VX-721 Single Frequency HPLL VCXO  
Standard Frequency Table  
Standard Frequency Table  
Standard Factory Configurable Frequencies (MHz)  
18.7500000  
19.2000000  
19.3926580  
19.4400000  
19.5312500  
19.6608000  
19.6989680  
19.7190000  
19.9218750  
20.0000000  
20.1416000  
20.4800000  
20.5444340  
20.7135000  
20.8285720  
20.8286000  
20.9165460  
21.0050840  
22.0000000  
22.1047720  
22.2171000  
22.5792000  
24.0000000  
24.5760000  
24.7040000  
25.0000000  
25.1658000  
25.6000000  
25.9200000  
26.0000000  
27.0000000  
27.6480000  
28.7040000  
29.4912000  
29.5000000  
30.0000000  
30.7200000  
30.8800000  
31.2500000  
32.0000000  
32.7680000  
33.0000000  
33.3330000  
34.3680000  
34.5600000  
36.8640000  
37.0560000  
37.1250000  
37.5000000  
38.8800000  
39.0625000  
39.3216000  
39.8437500  
40.0000000  
40.2830630  
40.9600000  
41.0888870  
41.6571440  
41.6600000  
41.8329130  
42.0000000  
42.0101690  
42.5000000  
42.6600000  
44.2095440  
44.4343000  
44.6218000  
44.7360000  
44.9280000  
45.1584000  
45.8240000  
46.0379460  
46.7200000  
46.8750000  
48.0000000  
49.1520000  
49.4080000  
50.0000000  
50.0480000  
51.2000000  
51.8400000  
52.0000000  
53.3300000  
54.7460000  
55.0000000  
60.0000000  
61.3800000  
61.4400000  
62.2080000  
62.5000000  
62.9145000  
63.3600000  
63.8976000  
64.0000000  
64.1520000  
65.5360000  
66.0000000  
70.0000000  
70.6560000  
71.6100000  
73.7280000  
74.1250000  
74.1758000  
74.2500000  
75.0000000  
76.8000000  
77.7600000  
78.0000000  
78.1250000  
78.6432000  
79.6875000  
80.0000000  
80.5664130  
82.1777380  
82.9440000  
83.3142880  
83.6658250  
84.0203380  
86.6853740  
88.4190880  
95.7000000  
97.5000000  
100.000000  
105.000000  
106.250000  
108.000000  
110.000000  
112.000000  
114.000000  
120.000000  
122.880000  
124.416000  
125.000000  
130.000000  
131.072000  
139.264000  
150.000000  
150.144000  
153.600000  
155.520000  
156.250000  
159.375000  
160.000000  
161.132813  
164.355475  
166.628572  
167.331646  
168.040678  
170.000000  
172.500000  
173.370748  
173.437500  
176.838175  
182.016000  
182.857142  
184.000000  
184.320000  
187.500000  
195.000000  
200.000000  
200.192000  
201.416020  
212.500000  
219.429571  
240.000000  
243.000000  
245.760000  
250.000000  
252.571428  
256.000000  
262.144000  
292.571429  
300.000000  
307.200000  
311.040000  
312.500000  
318.750000  
320.000000  
322.265650  
328.710950  
333.257150  
334.663300  
336.081350  
353.676350  
368.640000  
375.000000  
382.800000  
400.000000  
409.600000  
491.520000  
500.000000  
505.000000  
531.000000  
531.250000  
568.928600  
569.196400  
588.000000  
595.056000  
600.000000  
614.400000  
622.080000  
624.693800  
624.704800  
625.000000  
627.329600  
629.987800  
637.500000  
640.000000  
644.531250  
645.120000  
647.239400  
647.250800  
649.970300  
657.421875  
665.625600  
666.514286  
669.128100  
669.326582  
669.642900  
670.838600  
672.000000  
672.156250  
672.162712  
673.456600  
684.255400  
687.700000  
690.569196  
693.468750  
693.482991  
693.750000  
696.390625  
696.421478  
696.421875  
704.380600  
707.352700  
707.500000  
710.948600  
712.520000  
716.573200  
718.750000  
719.734400  
737.280000  
739.200000  
742.500000  
748.070900  
750.000000  
768.000000  
777.600000  
779.568600  
780.881000  
781.250000  
796.875000  
800.000000  
805.664100  
809.063500  
819.200000  
821.777300  
850.000000  
983.400000  
1,000.0000  
Recent Adds:  
174.703083  
175.000000  
698.812330  
Page 8 of 9  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
Rev2: 14 November 2012  
VX-721 Single Frequency HPLL VCXO  
Ordering Information  
VX - 721 - E C E - K E A A - xxxMxxxxxx  
Product Family  
VX: VCXO  
Frequency (See Above)  
10M0000000 - 1200M00000  
Performance Options  
N: Standard  
A: < 500 fs-rms Jitter  
Package  
721: 5 x 7 x 1.8 mm  
Enable/Disable  
A: Enable High  
C: Enable Low  
Supply  
E: 3.3 V  
H: 2.5 V  
Stability  
X: Standard  
E: 20ppm Temperature Stability  
Output  
A: LVCMOS  
C: LVPECL  
D: LVDS  
Operating Temperature  
T: 0/70°C  
E: -40/85 °C  
Absolute Pull Range  
K: 50 ppm  
Example: VX-721-ECE-KXCN-1000M00000  
For Additional Information, Please Contact  
USA:  
Europe:  
Asia:  
Vectron International  
267 Lowell Road  
Hudson, NH 03051  
Tel: 1.888.328.7661  
Vectron International  
Vectron International  
Landstrasse, D-74924  
Neckarbischofsheim, Germany  
Tel: +49 (0) 3328.4784.17  
1589 Century Avenue, the 19th Floor  
Chamtime International Financial Center  
Shanghai, China  
Tel: 86.21.6081.2888  
Fax: 86.21.6163.3598  
Fax: 1.888.329.8328  
Fax: +49 (0) 3328.4784.30  
Disclaimer  
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application.  
No rights under any patent accompany the sale of any such product(s) or information.  
Page 9 of 9  
Rev2: 14 November 2012  
Vectron Internaꢀonal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • hꢁp://www.vectron.com  
厂商 型号 描述 页数 下载

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