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LY6125616GL-10

型号：

LY6125616GL-10

描述：

5V 256K ×16位高速CMOS SRAM[ 5V 256K X 16 BIT HIGH SPEED CMOS SRAM ]

品牌：

LYONTEK[ Lyontek Inc. ]

页数：

14 页

PDF大小：

362 K

下载PDF手册
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
REVISION HISTORY  
Revision  
Rev. 1.0  
Rev. 1.1  
Rev. 1.2  
Rev. 2.0  
Description  
Initial Issue  
Revised VIL = 0.6V => 0.8V  
Revised Package Outline Dimension(TSOP-II)  
Added LL Spec.  
Issue Date  
Mar.23.2006  
Jun.9.2006  
Apr.12.2007  
Jun.25.2007  
Revised Test Condition of ISB1/IDR  
Added -12ns Spec.  
Revised ICC and ISB1  
Added I grade  
Revised ABSOLUTE MAXIMUN RATINGS  
Revised Test Condition of ICC  
Rev. 2.1  
Apr.17.2009  
Revised FEATURES & ORDERING INFORMATION Lead free  
and green package available to Green package available  
Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS  
Added packing type in ORDERING INFORMATION  
Added package type TFBGA  
Revised ORDERING INFORMATION in page 12  
Revised -12ns spec as -10ns spec and related parameter  
Revised ORDERING INFORMATION in page 11  
Rev. 2.2  
Rev. 2.3  
Rev. 2.4  
May.6.2010  
Aug.30.2010  
July.03.2013  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
0
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
FEATURES  
GENERAL DESCRIPTION  
The LY6125616 is a 4,194,304-bit low power CMOS  
static random access memory organized as 262,144  
words by 16 bits. It is fabricated using very high  
performance, high reliability CMOS technology. Its  
standby current is stable within the range of  
operating temperature.  
„ Fast access time : 10/15/20/25ns  
„ Low power consumption:  
Operating current : 215/140/110/100mA(MAX.)  
Standby current :  
15mA(MAX. for 10ns)  
3mA(MAX. for 15/20/25ns)  
100 A( (MAX. for 15/20/25ns LL version)  
µ
The LY6125616 is well designed for low power  
application, and particularly well suited for battery  
back-up nonvolatile memory application.  
„ Single 5V power supply  
„ All inputs and outputs TTL compatible  
„ Fully static operation  
„ Tri-state output  
„ Data byte control : LB# (DQ0 ~ DQ7)  
UB# (DQ8 ~ DQ15)  
„ Data retention voltage : 2.0V (MIN.)  
„ Green package available  
„ Package : 44-pin 400 mil TSOP-II  
48-ball 6mm x 8mm TFBGA  
The LY6125616 operates from a single power  
supply of 5V and all inputs and outputs are fully TTL  
compatible  
PRODUCT FAMILY  
Power Dissipation  
Product  
Family  
LY6125616  
LY6125616(I)  
LY6125616  
LY6125616(E)  
LY6125616(I)  
LY6125616(LL)  
LY6125616(LLI)  
Operating  
Temperature  
0 ~ 70℃  
-40 ~ 85℃  
0 ~ 70℃  
-20 ~ 80℃  
-40 ~ 85℃  
0 ~ 70℃  
Vcc  
Range  
Speed  
10ns  
10ns  
Standby(ISB1)  
15mA(MAX.)  
15mA(MAX.)  
Operating(Icc)  
215mA(MAX.)  
215mA(MAX.)  
4.5 ~ 5.5V  
4.5 ~ 5.5V  
4.5 ~ 5.5V 15/20/25ns  
4.5 ~ 5.5V 15/20/25ns  
4.5 ~ 5.5V 15/20/25ns  
3mA(MAX.) 140/110/100mA(MAX.)  
3mA(MAX.) 140/110/100mA(MAX.)  
3mA(MAX.) 140/110/100mA(MAX.)  
4.5 ~ 5.5V 15/20/25ns 100µA(MAX.) 140/110/100mA(MAX.)  
4.5 ~ 5.5V 15/20/25ns 100µA(MAX.) 140/110/100mA(MAX.)  
-40 ~ 85℃  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
1
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
PIN DESCRIPTION  
FUNCTIONAL BLOCK DIAGRAM  
SYMBOL  
DESCRIPTION  
A0 - A17  
Address Inputs  
Vcc  
Vss  
DQ0 – DQ15 Data Inputs/Outputs  
CE#  
WE#  
OE#  
LB#  
UB#  
VCC  
Chip Enable Input  
Write Enable Input  
Output Enable Input  
Lower Byte Control  
Upper Byte Control  
Power Supply  
256Kx16  
MEMORY ARRAY  
A0-A17  
DECODER  
VSS  
Ground  
DQ0-DQ7  
Lower Byte  
I/O DATA  
CIRCUIT  
COLUMN I/O  
DQ8-DQ15  
Upper Byte  
CE#  
WE#  
OE#  
LB#  
CONTROL  
CIRCUIT  
UB#  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
2
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
PIN CONFIGURATION  
LB# OE# A0  
DQ8 UB# A3  
DQ9 DQ10 A5  
A1  
A2 NC  
A
B
C
D
E
F
A4 CE# DQ0  
A6 DQ1 DQ2  
Vss DQ11 A17 A7 DQ3 Vcc  
Vcc DQ12 NC A16 DQ4 Vss  
DQ14 DQ13 A14 A15 DQ5 DQ6  
DQ15 NC A12 A13 WE# DQ7  
G
H
NC  
1
A8  
2
A9 A10 A11 NC  
3
4
5
6
TFBGA  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
3
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
ABSOLUTE MAXIMUN RATINGS*  
PARAMETER  
SYMBOL  
VT1  
RATING  
-0.5 to 6.5  
UNIT  
V
Voltage on VCC relative to VSS  
Voltage on any other pin relative to VSS  
VT2  
-0.5 to VCC+0.5  
0 to 70(C grade)  
-20 to 80(E grade)  
-40 to 85(I grade)  
-65 to 150  
V
℃
Operating Temperature  
TA  
℃
W
Storage Temperature  
Power Dissipation  
DC Output Current  
TSTG  
PD  
1
IOUT  
50  
mA  
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating  
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not  
implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.  
TRUTH TABLE  
I/O OPERATION  
MODE  
Standby  
CE# OE# WE# LB# UB#  
SUPPLY CURRENT  
DQ0-DQ7  
High – Z  
High – Z  
High – Z  
DOUT  
DQ8-DQ15  
High – Z  
High – Z  
High – Z  
High – Z  
DOUT  
H
L
L
L
L
L
L
L
L
X
H
X
L
L
L
X
X
X
X
H
X
H
H
H
L
X
X
H
L
H
L
L
H
L
X
X
H
H
L
L
H
L
ISB1  
ICC  
Output Disable  
Read  
High – Z  
DOUT  
ICC  
DOUT  
DIN  
High – Z  
DIN  
High – Z  
DIN  
Write  
L
L
ICC  
L
DIN  
Note: H = VIH, L = VIL, X = Don't care.  
DC ELECTRICAL CHARACTERISTICS  
SYMBOL  
TEST CONDITION  
MIN.  
4.5  
2.2  
- 0.3  
- 1  
TYP. *4 MAX.  
UNIT  
PARAMETER  
Supply Voltage  
VCC  
5.0  
5.5  
VCC+0.3  
0.8  
V
V
V
*1  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
Output Leakage  
Current  
VIH  
VIL  
-
-
-
*2  
ILI  
V
V
CC ≧ VIN ≧ VSS  
CC ≧ VOUT ≧ VSS,  
Output Disabled  
1
A
µ
ILO  
- 1  
-
1
A
µ
Output High Voltage  
Output Low Voltage  
VOH IOH = -4mA  
2.4  
-
-
-
-
V
V
VOL  
IOL = 8mA  
-
-
-
-
-
-
-
-
0.4  
10  
15  
20  
25  
215  
140  
110  
100  
15  
mA  
mA  
mA  
mA  
mA  
mA  
Cycle time = Min.  
Average Operating  
Power supply Current  
100  
80  
75  
-
0.1  
20  
ICC  
CE# = VIL , II/O = 0mA  
Others at VIL or VIH  
10  
Standby Power  
Supply Current  
CE# ≧VCC - 0.2V  
Others at 0.2V / VCC-0.2V  
15/20/25  
15/20/25LL  
3*5  
ISB1  
100*6  
A
µ
Notes:  
1. VIH(max) = VCC + 2.0V for pulse width less than 6ns.  
2. VIL(min) = VSS - 2.0V for pulse width less than 6ns.  
3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test.  
4. Typical values are included for reference only and are not guaranteed or tested.  
℃
Typical valued are measured at VCC = VCC(TYP.) and TA = 25  
5. 1mA for special request  
6. 50 A for special request  
µ
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
4
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
CAPACITANCE (TA = 25℃, f = 1.0MHz)  
PARAMETER  
Input Capacitance  
Input/Output Capacitance  
SYMBOL  
MIN.  
-
-
MAX  
8
10  
UNIT  
pF  
pF  
CIN  
CI/O  
Note : These parameters are guaranteed by device characterization, but not production tested.  
AC TEST CONDITIONS  
Input Pulse Levels  
0.2V to VCC - 0.2V  
Input Rise and Fall Times  
Input and Output Timing Reference Levels  
Output Load  
3ns  
1.5V  
CL = 30pF + 1TTL, IOH/IOL = -8mA/16mA  
AC ELECTRICAL CHARACTERISTICS  
(1) READ CYCLE  
PARAMETER  
SYM. LY6125616-10 LY6125616-15 LY6125616-20 LY6125616-25 UNIT  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low-Z  
Output Enable to Output in Low-Z tOLZ  
Chip Disable to Output in High-Z tCHZ  
Output Disable to Output in High-Z tOHZ  
Output Hold from Address Change tOH  
tRC  
tAA  
tACE  
tOE  
tCLZ  
10  
-
-
-
10  
10  
5
-
15  
-
-
-
15  
15  
7
-
20  
-
-
25  
-
-
-
25  
25  
9
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
20  
20  
8
-
-
-
-
*
*
*
*
2
0
-
-
3
-
4
0
-
-
3
-
4
0
-
-
3
-
4
0
-
-
3
-
-
-
-
5
5
-
5
5
-
7
7
-
7
7
-
8
8
9
9
-
9
9
-
LB#, UB# Access Time  
LB#, UB# to High-Z Output  
LB#, UB# to Low-Z Output  
tBA  
tBHZ  
tBLZ  
8
8
*
*
-
2
-
4
-
4
-
4
(2) WRITE CYCLE  
PARAMETER  
SYM. LY6125616-10 LY6125616-15 LY6125616-20 LY6125616-25 UNIT  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
Write Cycle Time  
tWC  
tAW  
tCW  
tAS  
tWP  
tWR  
tDW  
10  
8
8
0
8
0
6
0
2
-
-
-
-
-
-
-
-
-
-
6
-
15  
12  
12  
0
10  
0
8
0
4
-
-
-
-
-
-
-
-
-
-
8
-
20  
16  
16  
0
11  
0
9
0
5
-
-
-
-
-
-
-
-
-
-
9
-
25  
20  
20  
0
12  
0
10  
0
6
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write Time tDH  
Output Active from End of Write  
Write to Output in High-Z  
tOW  
tWHZ  
tBW  
*
*
-
20  
10  
-
LB#, UB# Valid to End of Write  
8
12  
16  
*These parameters are guaranteed by device characterization, but not production tested.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
5
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
TIMING WAVEFORMS  
READ CYCLE 1 (Address Controlled) (1,2)  
tRC  
Address  
Dout  
tAA  
tOH  
Previous Data Valid  
Data Valid  
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)  
tRC  
Address  
tAA  
CE#  
tACE  
LB#,UB#  
tBA  
OE#  
tOE  
tOH  
tOHZ  
tBHZ  
tCHZ  
tOLZ  
tBLZ  
tCLZ  
High-Z  
Dout  
High-Z  
Data Valid  
Notes :  
1.WE#is high for read cycle.  
2.Device is continuously selected OE# = low, CE# = low, LB# or UB# = low.  
3.Address must be valid prior to or coincident with CE# = low, LB# or UB# = low transition; otherwise tAA is the limiting parameter.  
4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
6
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)  
tWC  
Address  
tAW  
CE#  
tCW  
tBW  
tWP  
LB#,UB#  
tAS  
tWR  
WE#  
tWHZ  
TOW  
High-Z  
Dout  
Din  
(4)  
(4)  
tDW  
tDH  
Data Valid  
WRITE CYCLE 2 (CE# Controlled) (1,2,5,6)  
tWC  
Address  
tAW  
CE#  
tAS  
tWR  
tCW  
tBW  
LB#,UB#  
tWP  
WE#  
Dout  
Din  
tWHZ  
High-Z  
(4)  
tDW  
tDH  
Data Valid  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
7
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
WRITE CYCLE 3 (LB#,UB# Controlled)  
(1,2,5,6)  
tWC  
Address  
tAW  
tWR  
CE#  
tAS  
tCW  
tBW  
LB#,UB#  
WE#  
tWP  
tWHZ  
High-Z  
Dout  
(4)  
tDW  
tDH  
Din  
Data Valid  
Notes :  
1.WE#,CE#, LB#, UB# must be high during all address transitions.  
2.A write occurs during the overlap of a low CE#, low WE#, LB# or UB# = low.  
3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed  
on the bus.  
4.During this period, I/O pins are in the output state, and input signals must not be applied.  
5.If the CE#, LB#, UB# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state.  
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
DATA RETENTION CHARACTERISTICS  
PARAMETER  
VCC for Data Retention  
SYMBOL  
TEST CONDITION  
CE# ≧ VCC - 0.2V  
CC = 2.0V  
CE# ≧ VCC - 0.2V  
other pins at 0.2V or VCC-0.2V  
MIN. TYP. MAX. UNIT  
VDR  
2.0  
-
-
5.5  
10  
2
V
mA  
mA  
10  
-
-
-
V
Data Retention Current  
IDR  
15/20/25  
15/20/25LL  
0.05  
10  
50  
A
µ
Chip Disable to Data  
Retention Time  
Recovery Time  
See Data Retention  
Waveforms (below)  
tCDR  
tR  
0
-
-
-
-
ns  
ns  
tRC  
*
tRC = Read Cycle Time  
*
DATA RETENTION WAVEFORM  
VDR ≧ 2.0V  
Vcc(min.)  
Vcc  
Vcc(min.)  
tCDR  
tR  
VIH  
CE# ≧ Vcc-0.2V  
VIH  
CE#  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
8
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
PACKAGE OUTLINE DIMENSION  
Ⅱ
44-pin 400mil TSOP-  
Package Outline Dimension  
DIMENSIONS IN MILLMETERS  
DIMENSIONS IN MILS  
SYMBOLS  
MIN.  
-
NOM.  
-
MAX.  
1.20  
0.15  
1.05  
0.45  
0.21  
18.618  
12.014  
10.363  
-
MIN.  
NOM.  
-
MAX.  
A
A1  
A2  
b
-
47.2  
5.9  
41.3  
17.7  
8.3  
733  
473  
408  
-
0.05  
0.95  
0.30  
0.12  
18.212  
11.506  
9.957  
-
0.10  
1.00  
-
2.0  
37.4  
11.8  
4.7  
717  
453  
392  
-
3.9  
39.4  
-
c
-
-
D
18.415  
11.760  
10.160  
0.800  
0.50  
0.805  
-
725  
463  
400  
31.5  
19.7  
31.7  
-
E
E1  
e
L
0.40  
-
0.60  
-
15.7  
-
23.6  
-
ZD  
y
-
0.076  
6o  
-
3
0o  
3o  
0o  
3o  
6o  
Θ
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
9
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
48-ball 6mm × 8mm TFBGA Package Outline Dimension  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
10  
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
ORDERING INFORMATION  
Package Type  
Access Time  
(Speed)(ns)  
Temperature  
Packing  
Type  
Lyontek Item No.  
Range(℃)  
44Pin(400mil)  
TSOP-II  
10  
15  
Tray  
LY6125616ML-10  
℃
℃
~70  
0
Tape Reel  
Tray  
LY6125616ML-10T  
LY6125616ML-10I  
LY6125616ML-10IT  
LY6125616ML-15  
LY6125616ML-15LL  
LY6125616ML-15T  
℃
℃
-40 ~85  
Tape Reel  
Tray  
℃
0
℃
~70  
Tape Reel  
LY6125616ML-15LLT  
LY6125616ML-15E  
Tray  
℃
℃
-20 ~80  
Tape Reel  
Tray  
LY6125616ML-15ET  
LY6125616ML-15I  
LY6125616ML-15LLI  
LY6125616ML-15IT  
LY6125616ML-15LLIT  
LY6125616ML-20  
℃
℃
-40 ~85  
Tape Reel  
Tray  
20  
℃
℃
~70  
0
LY6125616ML-20LL  
LY6125616ML-20T  
LY6125616ML-20LLT  
LY6125616ML-20E  
LY6125616ML-20ET  
LY6125616ML-20I  
LY6125616ML-20LLI  
LY6125616ML-20IT  
LY6125616ML-20LLIT  
LY6125616ML-25I  
LY6125616ML-25LLI  
Tape Reel  
Tray  
℃
℃
℃
-20 ~80  
Tape Reel  
Tray  
℃
-40 ~85  
Tape Reel  
Tray  
25  
℃
℃
~70  
0
Tape Reel  
LY6125616ML-25IT  
LY6125616ML-25LLIT  
LY6125616ML-25E  
LY6125616ML-25ET  
LY6125616ML-25I  
Tray  
℃
℃
℃
-20 ~80  
Tape Reel  
Tray  
℃
-40 ~85  
LY6125616ML-25LLI  
LY6125616ML-25IT  
LY6125616ML-25LLIT  
Tape Reel  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
11  
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
Package Type  
Access Time  
(Speed)(ns)  
Temperature  
Packing  
Type  
Lyontek Item No.  
Range(℃)  
48-ball(6mmx8mm)  
TFBGA  
10  
15  
Tray  
LY6125616GL-10  
℃
℃
~70  
0
Tape Reel  
Tray  
LY6125616GL-10T  
LY6125616GL-10I  
LY6125616GL-10IT  
LY6125616GL-15  
℃
℃
-40 ~85  
Tape Reel  
Tray  
℃
0
℃
~70  
LY6125616GL-15LL  
LY6125616GL-15T  
LY6125616GL-15LLT  
LY6125616GL-15E  
LY6125616GL-15ET  
LY6125616GL-15I  
LY6125616GL-15LLI  
LY6125616GL-15IT  
LY6125616GL-15LLIT  
LY6125616GL-20  
Tape Reel  
Tray  
℃
℃
-20 ~80  
Tape Reel  
Tray  
℃
℃
-40 ~85  
Tape Reel  
Tray  
20  
℃
℃
~70  
0
LY6125616GL-20LL  
LY6125616GL-20T  
LY6125616GL-20LLT  
LY6125616GL-20E  
LY6125616GL-20ET  
LY6125616GL-20I  
LY6125616GL-20LLI  
LY6125616GL-20IT  
LY6125616GL-20LLIT  
LY6125616GL-25  
Tape Reel  
Tray  
℃
℃
℃
-20 ~80  
Tape Reel  
Tray  
℃
-40 ~85  
Tape Reel  
Tray  
25  
℃
℃
~70  
0
LY6125616GL-25LL  
LY6125616GL-25T  
LY6125616GL-25LLT  
LY6125616GL-25E  
LY6125616GL-25ET  
Tape Reel  
Tray  
℃
℃
℃
-20 ~80  
Tape Reel  
Tray  
LY6125616GL-25I  
℃
-40 ~85  
LY6125616GL-25LLI  
LY6125616GL-25IT  
LY6125616GL-25LLIT  
Tape Reel  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
12  
®
LY6125616  
5V 256K X 16 BIT HIGH SPEED CMOS SRAM  
Rev. 2.4  
THIS PAGE IS LEFT BLANK INTENTIONALLY.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
13  
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