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IZ9921

型号:

IZ9921

描述:

- 12号的铝制车身绘( RAL 7032 )

品牌:

ETC[ ETC ]

页数:

7 页

PDF大小:

386 K

The IZ9921M, IZ9922M and IZ9923M are high-voltage LED driver control ICs with built-in  
MOSFET switch and intended for LED lighting control. They allow efficient operation of LED strings from  
voltage sources ranging up to 400 VDC. The IZ9921M/22M/23M includes an internal high-voltage  
switching MOSFET controlled with fixed off-time TOFF of approximately 10 µs. The LED string is driven  
at constant current, thus providing constant light output and enhanced reliability. The output current is  
internally fixed at 20 mA for IZ9921M, 50 mA for IZ9922M and 30 mA for IZ9923M. The peak current  
control scheme provides good regulation of the output current throughout the universal AC line voltage  
range of 85 to 264 VAC or DC input voltage of 20 to 400 V.  
FEATURES:  
APPLICATIONS:  
Operating temperature range -400С … +85 0С  
ON-resistance of the MOSFET switch  
210 Ohm  
Decorative Lighting  
Low Power Light Fixtures  
LED Signs and Displays  
Architectural Lighting  
Incandescent Replacements  
Industrial Lighting  
OFF-state breakdown voltage of the  
MOSFET switch not less 500 V  
Figure 1 – Block diagram  
Ver. 1.0  
Dec. 2011  
1
Table 1 – Contact pad description  
Contact  
Symbol  
Description  
pad  
number  
01  
02  
03  
04  
05  
06  
07  
08  
09  
10  
11  
12  
13  
14  
TST  
PR3  
PR2  
TR  
Test pad  
Test pad  
Test pad  
Test pad  
PR1  
PR4  
UDD  
Test pad  
Test pad  
Supply voltage pad  
Test pad  
TU  
GND  
PU1  
PU2  
PU3  
DRAIN  
GND  
Ground  
Test pad  
Test pad  
Test pad  
MOSFET switch drain pad  
Ground  
Note:  
1 Contact pad 01 - 06, 08, 10, 11, 12, 14 (test pads) are used for testing process on  
manufacturing fab only (have not to be bonded by customer).  
2 Contact pad 09, 14 (Ground) are electrically connected  
Table 2 – Recommended operation conditions  
Symbol  
Parameter  
Min  
Max  
Unit  
VDRAIN  
Input voltage  
20  
400  
V
Table 3 – Absolute maximum rating  
Symbol  
Parameter  
Min  
Max  
Unit  
VDRAIN  
Input voltage  
Low-voltage part supply voltage  
-0.3  
420  
V
VDD  
-0.3  
10  
V
Ver. 1.0  
Dec. 2011  
2
Table 4 – Electric parameters  
Ambient  
temp., oC  
Symbol  
Parameter  
Test condition  
Unit  
Min  
Max  
VDDR  
IDD  
Regulator output voltage  
5.5  
-
9.0  
V
VIN = (20 ÷ 400)V  
VDD = 9.5 V  
Low-voltage (control) part  
of IC consumption  
current  
350  
µA  
V
DRAIN = 40 V  
ON-resistance of the  
switch (DRAIN)  
VDD = UDDR  
DRAIN = 20 mA  
VDD = UUVLO  
RON  
-
210  
Ohm  
V
I
25 10  
Under voltage threshold  
(Low-voltage part of IC)  
IDRAIN = 20 mA(IZ9921M)  
IDRAIN = 50 mA(IZ9922M)  
IDRAIN = 30 mA(IZ9923M)  
VUVLO  
3.4  
VDDR – 0.3  
MOSFET saturation  
current (DRAIN pin)  
VDD= VDDR  
ISAT  
VBR  
100  
500  
-
-
mA  
V
VSAT = 50 V  
MOSFET switch  
breakdown voltage  
Threshold current  
IZ9921M  
VDD = VDDR  
IDRAIN = 1 mA  
25 10  
-40  
20.5  
52.0  
30.8  
25.5  
63.0  
38.2  
ITH  
V
V
DD = VDDR  
mA  
IZ9922M  
85  
IZ9923M  
OFF time  
(DRAIN )  
TOFF  
TON  
µs  
ns  
ns  
8.0  
-
13.0  
650  
400  
Minimum ON-time of the  
switch (DRAIN)  
Leading Edge Blanking  
Delay  
DD = VDDR  
25 10  
TBLANK  
200  
Functional Description  
The IZ9921M/22M/23M are PWM peak current controllers for controlling a buck converter  
topology in continuous conduction mode (CCM). The output current is internally preset at 20 mA  
(IZ9921M), 50 mA (IZ9922M) or 30 mA (IZ9923M). When the input voltage of 20 to 400 V appears at  
the DRAIN pin, the internal high-voltage linear regulator seeks to maintain a voltage of 7 VDC at the  
VDD pin. Until this voltage exceeds the internally programmed under-voltage threshold, the output  
DRAIN is non-conductive. When the threshold is exceeded, the DRAIN turns on. The input current  
begins to flow into the DRAIN pin. Hysteresis is provided in the under-voltage comparator to prevent  
oscillation. When the input current exceeds the internal preset level, a current sense comparator resets  
an RS flip-flop, and the DRAIN turns off. At the same time, a one-shot circuit is activated that  
determines the duration of the off-state (10 µS typ.). As soon as this time is over, the flip-flop sets  
again. The new switching cycle begins. A “blanking” delay of 300 nS is provided that prevents false  
triggering of the current sense comparator due to the leading edge spike caused by circuit parasitics.  
Ver. 1.0  
Dec. 2011  
3
Typical Application Circuit  
Selecting L and D  
There is a certain trade-off to be considered between optimal sizing of the output inductor L and  
the tolerated output current ripple. The required value of L is inversely proportional to the ripple current  
dIO in it.  
TOFF_MIAX * VO  
(1)  
L   
dIO  
VO is the forward voltage of the LED string. TOFF is the off time of the IZ9921M/22M/23M. The  
output current in the LED string (IO) is calculated then as:  
1
IO ITH dIO  
(2)  
2
where ITH is the current sense comparator threshold.  
The ripple current introduces a peak-to-average error in the output current setting that needs to  
be accounted for. Due to the constant off-time control technique used in the IZ9921M/22M/23M, the  
ripple current is independent of the input AC or DC line voltage variation. Therefore, the output current  
will remain unaffected by the varying input voltage. Adding a filter capacitor across the LED string can  
reduce the output current ripple even further, thus permitting a reduced value of L. However, one must  
keep in mind that the peak-to-average current error is affected by the variation of TOFF. Therefore, the  
initial output current accuracy might be sacrificed at large ripple current in L.  
Another important aspect of designing an LED driver with the IZ9921M/22M/23M is related to  
certain parasitic elements of the circuit, including distributed coil capacitance of L, junction capacitance  
Ver. 1.0  
Dec. 2011  
4
and reverse recovery of the rectifier diode D, capacitance of the printed circuit board traces CPCB and  
output capacitance CDRAIN of the controller itself. These parasitic elements affect the efficiency of the  
switching converter and could potentially cause false triggering of the current sense comparator if not  
properly managed. Minimizing these parasitics is essential for efficient and reliable operation of the  
IZ9921M/22M/23M. Coil capacitance of inductors is typically provided in the manufacturer’s data books  
either directly or in terms of the self-resonant frequency (SRF).  
1
SRF   
(3)  
2L * CL  
where L is the inductance value, and CL is the coil capacitance.  
Charging and discharging this capacitance every switching cycle causes high-current spikes in  
the LED string. Therefore, connecting a small capacitor CO (~10 nF) is recommended to bypass these  
spikes. Using an ultra-fast rectifier diode for D is recommended to achieve high efficiency and reduce  
the risk of false triggering of the current sense comparator. Using diodes with shorter reverse recovery  
time tRR and lower junction capacitance CJ achieves better performance. The reverse voltage rating VR  
of the diode must be greater than the maximum input voltage of the LED lamp. The total parasitic  
capacitance present at the DRAIN pin of the IZ9921M/22M/23M can be calculated as:  
CP CDRAIN CPCB CL CJ  
(4)  
where and CDRAIN is the DRAIN capacitance (CDRAIN < 5 pF), and CPSB is the printed-circuit board  
capacitance.  
When the switching MOSFET turns on, the capacitance CP is discharged into the DRAIN pin of  
the IC. The discharge current is limited to about 150 mA typically. However, it may become lower at  
increased junction temperature. The duration of the leading edge current spike can be estimated as:  
V *CP  
IN  
TSPIKE tRR  
(5)  
ISAT  
In order to avoid false triggering of the current sense comparator, CP must be minimized in  
accordance with the following expression:  
ISAT * (TBLANK_MIN tRR )  
(6)  
CP   
VIN_MAX  
where TBLANK_MIN is the minimum blanking time of 200 ns, and VIN  
instantaneous input voltage.  
is the maximum  
_MAX  
Estimating Power Loss  
Discharging the parasitic capacitance CP into the DRAIN pin of the IZ9921M/22M/23M is  
responsible for the bulk of the switching power loss. It can be estimated using the following equation:  
Ver. 1.0  
Dec. 2011  
5
VIN2 * CP  
2
PSWITCH  
V *ISAT * t  
*FS  
(7)  
IN  
RR   
where Fs is the switching frequency, ISAT is the saturated DRAIN current of the  
IZ9921M/22M/23M. The switching loss is the greatest at the maximum input voltage. The switching  
frequency is given by the following:  
V VO  
IN  
FS   
(8)  
V * TOFF  
IN  
The switching power loss associated with turn-off transitions of the DRAIN pin can be  
disregarded. Due to the large amount of parasitic capacitance connected to this switching node, the  
turn-off transition occurs essentially at zero-voltage. Conduction power loss in the IZ9921M/22M/23M  
can be calculated as:  
VO  
2
PCOND IO *RON  
*
IDD *(VIN VO )  
(9)  
V
IN  
where RON is the ON resistance, IDD is the internal linear regulator current.  
PTOTAL PSWITCH PCOND (10)  
Ver. 1.0  
Dec. 2011  
6
Contact pad layout diagram  
Die thickness 0.46±0.02 mm.  
Technological mark coordinates, um: х=918, у=427.  
Table 5 – Technological mark  
Type of IC  
IZ9921M  
IZ9922M  
IZ9923M  
Technological mark  
20 9921-1  
20 9922-1  
20 9923-1  
Table 6 - Contact pad coordinates and sizes  
Contact pad  
number  
Coordinates (left bottom corner), um  
Contact pad  
dimension, um  
85 x 85  
70 x 70  
70 x 70  
85 x 85  
70 x 70  
70 x 70  
95 x 95  
85 x 85  
85 x 85  
70 x 70  
70 x 70  
70 x 70  
95 x 570  
95 x 95  
X
Y
01  
02  
03  
04  
05  
06  
07  
08  
09  
10  
11  
12  
13  
14  
665  
804  
928  
1057  
1201  
1325  
1306  
1242  
1096  
966  
110  
110  
110  
110  
110  
110  
345  
950  
950  
965  
965  
965  
273  
356  
860  
754  
246  
774  
Note - Contact pad coordinates and dimensions are indicated under “Passivation” layer  
Ver. 1.0  
Dec. 2011  
7
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